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參數(shù)資料
| 型號： | ADC12451CMJ |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | Low Dropout Linear 1-cell Li-Ion Charge Controller with AutoCompTM, 4.1V 8-TSSOP -20 to 70 |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP24 |
| 封裝： | CERAMIC, DIP-24 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大小： | 311K |
| 代理商： | ADC12451CMJ |
TL/H/11025
A
P
December 1994
ADC12451 Dynamically-Tested Self-Calibrating
12-Bit Plus Sign A/D Converter with Sample-and-Hold
General Description
The ADC12451 is a CMOS 12-bit plus sign successive ap-
proximation analog-to-digital converter whose dynamic
specifications (S/N, THD, etc.) are tested and guaranteed.
On request, the ADC12451 goes through a self-calibration
cycle that adjusts linearity, zero and full-scale errors. The
ADC12451 also has the ability to go through an Auto-Zero
cycle that corrects the zero error during every conversion.
The analog input to the ADC12451 is tracked and held by
the internal circuitry, so an external sample-and-hold is not
required. The ADC12451 has a S/H control input which di-
rectly controls the track-and-hold state of the A/D. A unipo-
lar analog input voltage range (0V to
a
5V) or a bipolar
range (
b
5V to
a
5V) can be accommodated with
g
5V sup-
plies.
The 13-bit data result is available on the eight outputs of the
ADC12451 in two bytes, high-byte first and sign extended.
The digital inputs and outputs are compatible with TTL or
CMOS logic levels.
Applications
Y
Digital Signal Processing
Y
Audio
Y
Telecommunications
Y
High Resolution Process Control
Y
Instrumentation
Features
Y
Self-calibration provides excellent temperature stability
Y
Internal sample-and-hold
Y
8-bit
m
P/DSP interface
Y
Bipolar input range with a single
a
5V reference
Key Specifications
Y
Resolution
12 bits plus sign
7.7
m
s (max)
83 kHz (max)
73.5 dB (min)
b
78.0 dB (max)
Y
Conversion Time
Y
Sampling Rate
Y
Bipolar Signal/Noise
Y
Total Harmonic Distortion
Y
Aperture Time
100 ns
100 ps
rms
g
2 LSB (max)
g
1.5 LSB (max)
113 mW (max)
Y
Aperture Jitter
Y
Zero Error
Y
Positive Full-Scale Error
Y
Power Consumption
@
g
5V
Simplified Block Diagram
TL/H/11025–1
Connection Diagram
Dual-In-Line Package
TL/H/11025–2
Top View
Ordering Information
Industrial
Package
(
b
40
§
C
s
T
A
s
85
§
C)
ADC12451CIJ
J24A
Military
Package
(
b
55
§
C
s
T
A
s
125
§
C)
ADC12451CMJ,
ADC12451CMJ/883
J24A
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M115/Printed in U. S. A.
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參數(shù)描述 |
|---|---|
| ADC12451CMJ/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 13-Bit |
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