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| 型號： | ADC700JH |
| 英文描述： | 16-Bit Resolution With Microprocessor Interface A/D CONVERTER |
| 中文描述： | 16位分辨率，微處理器接口的A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大小： | 148K |
| 代理商： | ADC700JH |
3
ADC700
*Same specs as ADC700JH, AH, RH.
NOTES: (1) TTL, LSTTL, and 5V CMOS compatible. (2) FSR means Full Scale Range. For example, unit connected for
±
10V range has 20V FSR. (3) Externally
adjustable to zero. (4) See Table I. USB – Unipolar Straight Binary; BTC – Binary Two’s Complement; BOB – Bipolar Offset Binary; NRZ – Non Return to Zero. (5)
Max supply current is specified at rated supply voltages. (6) All input control signals are specified with t
= t
= 5ns (10% to 90% of 5V) and timed from a voltage
level of 1.6V. (7) t
is measured with the load circuits of Figure 1 and defined as the time required for an output to cross 0.8V or 2.4V. (8) t
16
is defined as the time
required for the data lines to change 0.5V when loaded with the circuits of Figure 2.
ORDERING INFORMATION
TEMPERATURE
RANGE
LINEARITY
ERROR (%FSR)
MODEL
1–24
25–99
100+
ADC700JH
ADC700KH
ADC700AH
ADC700BH
ADC700RH
ADC700SH
0
°
C to 70
°
C
0
°
C to 70
°
C
–25
°
C to +85
°
C
–25
°
C to +85
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
±
0.006
±
0.003
±
0.006
±
0.003
±
0.006
±
0.003
ABSOLUTE MAXIMUM RATINGS
+V
DD
to Digital Common ............................................................ 0V to +7V
+V
CC
to Analog Common ......................................................... 0V to +18V
–V
to Analog Common ......................................................... 0V to –18V
Digital Common to Analog Common........................................ –1V to +1V
Digital Inputs to Digital Common................................ –0.5V to V
+ 0.5V
Analog Inputs ..................................................................................+16.5V
Power Dissipation ........................................................................1000mW
Storage Temperature ...................................................... –60
°
C to +150
°
C
Lead Temperature, (soldering, 10s)............................................... +300
°
C
NOTES: Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maxi-
mum rating conditions for extended periods may affect device reliability.
PACKAGING INFORMATION
PACKAGE DRAWING
NUMBER
(1)
MODEL
PACKAGE
ADC700JH
ADC700KH
ADC700AH
ADC700BH
ADC700RH
ADC700SH
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
237
237
237
237
237
237
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
LIMIT AT
T
= 0, +70
°
C
–25
°
C, +85
°
C
LIMIT AT
T
A
= 25
°
C
LIMIT AT
PARAMETER
T
A
= –55
°
C, +125
°
C
UNITS
DESCRIPTION
CONVERSION AND SERIAL DATA OUTPUT TIMING
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
0
0
0
ns, min
ns, max
ns, min
ns, min
μ
s, max
ns, max
ns, max
ns, min
ns, max
ns, min
CS to WR Setup time
WR to Status delay
WR pulse width
CS to WR Hold time
Conversion time
Data Ready to Status time
WR to first Serial Data Strobe
First Serial Data to first Serial Data Strobe
Last Serial Data Strobe to Status
Status to WR Setup time
110
40
0
15
550
1100
250
310
0
130
40
0
17
600
1150
210
360
0
145
40
0
17
650
1250
200
400
0
PARALLEL DATA OUTPUT TIMING
t
11
t
12
0
0
50
0
0
0
0
ns, min
ns, min
ns, max
HBEN to RD Setup time
CS to RD Setup time
High Byte Data Valid after RD
C
L
= 20pF (High Byte bus access time)
High Byte Data Valid after RD
C
L
= 100pF (High Byte bus access time)
RD pulse width
Data Ready delay from RD (HBEN asserted)
Data Hold time after RD (bus relinquish time)
RD to CS Hold time
RD to HBEN Hold time
t
13
(7)
58
66
70
81
95
ns, max
t
14
t
t
115
t
17
t
18
40
40
50
0
0
40
45
60
0
0
40
50
65
0
0
ns, min
ns, max
ns, max
ns, min
ns, min
RESET TIMING
t
19
t
20
60
70
70
81
80
95
ns, max
ns, max
Data Ready low delay from Reset
Status low delay from Reset
TIMING SPECIFICATIONS
(6)
At V
DD
= +5V, +V
CC
= +12V or +15V, –V
CC
= –12V or –15V, unless otherwise noted.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ADC700KH | 制造商:Texas Instruments 功能描述:ADC Single SAR 16-bit Parallel/Serial 28-Pin CDIP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADC700RH | 制造商:BB 制造商全稱:BB 功能描述:16-Bit Resolution With Microprocessor Interface A/D CONVERTER |
| ADC700SH | 制造商:BB 制造商全稱:BB 功能描述:16-Bit Resolution With Microprocessor Interface A/D CONVERTER |
| ADC701 | 制造商:BB 制造商全稱:BB 功能描述:16-Bit 512kHz SAMPLING A/D CONVERTER SYSTEM |
| ADC701 WAF | 制造商:Texas Instruments 功能描述: |
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