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參數(shù)資料
| 型號： | ADC9708 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 162K |
| 代理商： | ADC9708 |
Functional Description
(Continued)
Auto-Zero and Full-Scale Features
No Zero Offset
No Full-Scale Error
TL/H/10409–3
Count (n)
e
V
IN
V
REF
FIGURE 5. Ideal Transfer Function
c
256
N
F.S.
i
256
N
Z
i
0
(N) has both full-scale and zero errors
FIGURE 6. Transfer Function with
Zero and Full-Scale Error
TL/H/10409–4
N
ê
e
N
b
N
Z
N
ê
has Full-Scale Error
TL/H/10409–5
FIGURE 7. Transfer Functions with
Zero-Correction Added
TL/H/10409–6
N
×
e
(N
b
N
Z
)
c
256
(N
F.S.
b
N
Z
)
FIGURE 8. Transfer Function with both Zero and
Full-Scale Correction Added
Typical Applications
Application Suggestions and Formulas
1. The capacitor node impedance is approximately 30
mX
and should have no parallel resistance for proper opera-
tion.
2. t
R
when V
IN
e
0V will be finite (i.e., the comparator will
always toggle for V
IN
t
0V).
3. The ramp stop output is open collector, and an external
pull-up resistor is required.
4. All digital inputs and outputs are TTL compatible.
5. For proper operation, timing commences on the 0 to 1
transition of ramp start and terminates on the 1 to 0 tran-
sition of ramp stop.
6. t
A
t
C
H
I
A
b
I
R
c
V
REF
(SeeFigure 1 )
7. t
R
(ramp time)
e
C
H
I
R
c
V
IN
, t
R
l
max
e
C
H
I
R
c
V
REF
(See Figure 1 )
8. I
R
e
V
CC
b
V
REF
R
REF
9. 2V
s
V
REF
s
(V
CC
b
2V)
10. Address lines A0, A1, A2 must be stable throughout the
sampling interval, t
A
.
11. Pin 6 (R
REF
) should be bypassed to ground via a 0.02
m
F capacitor.
Microprocessor Considerations
Several alternatives exist from a hardware/software stand-
point in microprocessor based systems using the ADC9708.
1. The ramp time measurement may be implemented in
software using a register increment, followed by a branch
back depending on the status of the ramp stop.
2. Alternately, the ramp stop may be tied into the interrupt
structure in systems containing a programmable binary
timer. This scheme has the following advantages:
a. The CPU is not committed during the ramp time inter-
val.
b. It requires only 5 bits of an I/O port for control signals.
5
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