參數(shù)資料
型號(hào): ADCMP562BRQ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 4/16頁(yè)
文件大小: 0K
描述: IC COMPARATOR PECL DUAL 20QSOP
標(biāo)準(zhǔn)包裝: 56
類(lèi)型: 帶鎖銷(xiāo)
元件數(shù): 2
輸出類(lèi)型: 補(bǔ)充型,差分,開(kāi)路發(fā)射極,PECL
電壓 - 電源,單路/雙路(±): ±4.75 V ~ 5.25 V
電壓 - 輸入偏移(最小值): 2mV @ -5.2V,5V
電流 - 輸入偏壓(最小值): 3µA @ -5.2V,5V
電流 - 輸出(標(biāo)準(zhǔn)): 30mA
電流 - 靜態(tài)(最大值): 5mA,28mA,13mA
CMRR, PSRR(標(biāo)準(zhǔn)): 80dB CMRR,85dB PSRR
傳輸延遲(最大): 0.83ns
磁滯: ±1mV
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SSOP(0.154",3.90mm 寬)
安裝類(lèi)型: 表面貼裝
包裝: 管件
配用: EVAL-ADCMP562BRQZ-ND - BOARD EVALUATION ADCMP562BRQZ
ADCMP561/ADCMP562
Rev. A | Page 12 of 16
Propagation delay dispersion is a specification that is important
in critical timing applications such as ATE, bench instruments,
and nuclear instrumentation. Overdrive dispersion is defined
as the variation in propagation delay as the input overdrive
conditions are changed (Figure 19). For the ADCMP561 and
ADCMP562, overdrive dispersion is typically 75 ps as the
overdrive is changed from 100 mV to 1.5 V. This specification
applies for both positive and negative overdrive because the
ADCMP561/ADCMP562 have equal delays for positive and
negative going inputs.
Q OUTPUT
INPUT VOLTAGE
1.5V OVERDRIVE
20mV OVERDRIVE
DISPERSION
VREF ± VOS
04687-0-005
Figure 19. Propagation Delay Dispersion
COMPARATOR HYSTERESIS
The addition of hysteresis to a comparator is often useful in a
noisy environment, or where it is not desirable for the
comparator to toggle between states when the input signal is at
the switching threshold. The transfer function for a comparator
with hysteresis is shown in Figure 20. If the input voltage
approaches the threshold from the negative direction, the
comparator switches from a 0 to a 1 when the input crosses
+VH/2. The new switching threshold becomes VH/2. The
comparator remains in a 1 state until the threshold VH/2 is
crossed, coming from the positive direction. In this manner,
noise centered on 0 V input does not cause the comparator to
switch states unless it exceeds the region bounded by ±VH/2.
Positive feedback from the output to the input is often used to
produce hysteresis in a comparator (Figure 24). The major
problem with this approach is that the amount of hysteresis
varies with the output logic levels, resulting in a hysteresis that
is not symmetrical around zero.
In the ADCMP562, hysteresis is generated through the
programmable hysteresis pin. A resistor from the HYS pin to
GND creates a current into the part that is used to generate
hysteresis. Hysteresis generated in this manner is independent
of output swing and is symmetrical around the trip point. The
hysteresis versus resistance curve is shown in Figure 21.
A current source can also be used with the HYS pin. The
relationship between the current applied to the HYS pin and the
resulting hysteresis is shown in Figure 17.
OUTPUT
INPUT
0
1
0V
–VH
2
+VH
2
04687-0-006
Figure 20. Comparator Hysteresis Transfer Function
160
140
120
100
80
60
40
20
0
10
20
30
40
50
04687-0-021
RHYS (k)
PR
OGR
A
M
E
D
H
YSTER
ESIS
(
m
V)
Figure 21. Comparator Hysteresis vs. RHYS
MINIMUM INPUT SLEW RATE REQUIREMENT
As for all high speed comparators, a minimum slew rate must
be met to ensure that the device does not oscillate when the
input crosses the threshold. This oscillation is due in part to the
high input bandwidth of the comparator and the parasitics of
the package. Analog Devices recommends a slew rate of 1 V/s
or faster to ensure a clean output transition. If slew rates less
than 1 V/s are used, hysteresis should be added to reduce the
oscillation.
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