參數(shù)資料
型號: ADCMP573BCPZ-RL7
廠商: Analog Devices Inc
文件頁數(shù): 1/16頁
文件大小: 0K
描述: IC COMPARATOR PECL 3.3-5 16LFCSP
標(biāo)準(zhǔn)包裝: 1,500
類型: 帶鎖銷
元件數(shù): 1
輸出類型: 補充型,PECL
電壓 - 電源,單路/雙路(±): 3.1 V ~ 5.4 V
電壓 - 輸入偏移(最小值): 2mV @ 3.3V
電流 - 輸入偏壓(最小值): 25µA @ 3.3V
電流 - 輸出(標(biāo)準(zhǔn)): 35mA
電流 - 靜態(tài)(最大值): 80mA
CMRR, PSRR(標(biāo)準(zhǔn)): 65dB CMRR,74dB PSRR
傳輸延遲(最大): 0.165ns
磁滯: ±1mV
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-VFQFN 裸露焊盤,CSP
安裝類型: 表面貼裝
包裝: 帶卷 (TR)
配用: EVAL-ADCMP573BCPZ-ND - BOARD EVALUATION ADCMP573BCP
Ultrafast 3.3 V/5 V
Single-Supply SiGe Comparators
ADCMP572/ADCMP573
Rev. A
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2005–2009 Analog Devices, Inc. All rights reserved.
FEATURES
3.3 V/5.2 V single-supply operation
150 ps propagation delay
15 ps overdrive and slew rate dispersion
8 GHz equivalent input rise time bandwidth
80 ps minimum pulse width
35 ps typical output rise/fall
10 ps deterministic jitter (DJ)
200 fs random jitter (RJ)
On-chip terminations at both input pins
Robust inputs with no output phase reversal
Resistor-programmable hysteresis
Differential latch control
Extended industrial 40°C to +125°C temperature range
APPLICATIONS
Clock and data signal restoration and level shifting
Automatic test equipment (ATE)
High speed instrumentation
Pulse spectroscopy
Medical imaging and diagnostics
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
FUNCTIONAL BLOCK DIAGRAM
VP NONINVERTING
INPUT
VTP TERMINATION
VTN TERMINATION
VN INVERTING
INPUT
LE INPUT
HYS
Q OUTPUT
LE INPUT
04409-025
ADCMP572
ADCMP573
CML/
RSPECL
VCCO
VCCI
Figure 1.
GENERAL DESCRIPTION
The ADCMP572 and ADCMP573 are ultrafast comparators
fabricated on Analog Devices’ proprietary XFCB3 Silicon
Germanium (SiGe) bipolar process. The ADCMP572 features
CML output drivers and latch inputs, and the ADCMP573
features reduced swing PECL (RSPECL) output drivers and
latch inputs.
Both devices offer 150 ps propagation delay and 80 ps
minimum pulse width for 10 Gbps operation with 200 fs rms
random jitter (RJ). Overdrive and slew rate dispersion are
typically less than 15 ps.
A flexible power supply scheme allows both devices to operate
with a single 3.3 V positive supply and a 0.2 V to +1.2 V input
signal range or with split input/output supplies to support a
wider 0.2 V to +3.2 V input signal range and an independent
range of output levels. 50 Ω on-chip termination resistors are
provided at both inputs with the optional capability to be left
open (on an individual pin basis) for applications requiring
high impedance inputs.
The CML output stage is designed to directly drive 400 mV into
50 Ω transmission lines terminated to between 3.3 V to 5.2 V.
The RSPECL output stage is designed to drive 400 mV into
50 Ω terminated to VCCO 2 V and is compatible with several
commonly used PECL logic families. The comparator input
stage offers robust protection against large input overdrive, and
the outputs do not phase reverse when the valid input signal
range is exceeded. High speed latch and programmable
hysteresis features are also provided.
The ADCMP572 and ADCMP573 are available in a 16-lead
LFCSP package and have been characterized over an extended
industrial temperature range of 40°C to +125°C.
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ADCMP573BCPZ-WP 功能描述:IC COMPARATOR PECL 3.3-5 16LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS,推挽式,滿擺幅,TTL 電壓 - 電源,單路/雙路(±):2.5 V ~ 5.5 V,±1.25 V ~ 2.75 V 電壓 - 輸入偏移(最小值):5mV @ 5.5V 電流 - 輸入偏壓(最小值):1pA @ 5.5V 電流 - 輸出(標(biāo)準(zhǔn)):- 電流 - 靜態(tài)(最大值):24µA CMRR, PSRR(標(biāo)準(zhǔn)):80dB CMRR,80dB PSRR 傳輸延遲(最大):450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA,CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586
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