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參數(shù)資料
| 型號： | ADCMP581BCP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Ultrafast SiGe Voltage Comparator |
| 中文描述： | COMPARATOR, 5000 uV OFFSET-MAX, QCC16 |
| 封裝： | MO-220-VEED-2, LFCSP-16 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大小： | 284K |
| 代理商： | ADCMP581BCP |
Preliminary Technical Data
ADCMP580/ADCMP581/ADCMP582
APPLICATION INFORMATION
POWER/GROUND LAYOUT AND BYPASSING
The ADCMP58x family of comparators is designed for very
high speed applications. Consequently, high speed design
techniques must be used to achieve the specified performance.
It is critically important to use low impedance supply planes,
particularly for the negative supply (V
EE
), the output supply
plane (V
CCO
) and the ground plane (GND). Individual supply
planes are recommended as part of a multilayer board.
Providing the lowest inductance return path for the switching
currents ensures the best possible performance in the target
application.
Rev. PrA | Page 9 of 16
It is also important to adequately bypass the input and output
supplies. A 1 μF electrolytic bypass capacitor should be placed
within several inches of each power supply pin to ground. In
addition, multiple high quality 0.1μF bypass capacitors should
be placed as close as possible to each of the V
EE,
V
CCI,
and
V
CCO
supply pins and should be connected to the GND plane with
redundant vias. High frequency bypass capacitors should be
carefully selected for minimum inductance and ESR. Parasitic
layout inductance should be strictly avoided to maximize the
effectiveness of the bypass at high frequencies.
ADCMP58x FAMILY OF OUTPUT STAGES
Specified propagation delay dispersion performance can be
achieved by using proper transmission line terminations. The
outputs of the ADCMP580 comparators are designed to directly
drive 400 mV into 50 cable or microstrip/stripline
transmission lines terminated with 50 referenced to the GND
return. The CML output stage is shown in the simplified
schematic diagram in Figure 14. The outputs are each back-
terminated with 50 for best transmission line matching. The
outputs of the ADCMP581/ADCMP582 are illustrated in
Figure 15 and should be terminated to 2 V for ECL outputs of
ADCMP581 and VCCO 2 V for PECL outputs of
ADCMP582. As an alternative, Thevenin equivalent
termination networks may also be used. If high speed CML
signals must be routed more than a centimeter, then either
microstrip or stripline techniques is required to ensure proper
transition times and to prevent excessive output ringing and
pulse-width-dependant propagation delay dispersion.
Q
16mA
50
Q
0
GND
V
EE
Figure 14. Simplified Schematic Diagram of ADCMP580 CML Output Stage
0
GND
V
EE
Q
Q
Figure 15. Simplified Schematic Diagram of
the ADCMP581/ADCMP582 ECL Output Stage
USING/DISABLING THE LATCH FEATURE
The latch inputs (LE/LE) are active low for latch mode, and are
internally terminated with 50 resistors to the V
TT
pin. When
using the ADCMP580, V
TT
should be connected to ground.
When using the ADCMP581, V
TT
should be connected to 2 V.
When using the ADCMP582, V
TT
should be connected
externally to V
CCO
2 V, preferably to its own low inductance
plane.
When using the ADCMP580/ADCMP582, the latch function
can be disabled by connecting the LE pin to V
EE
with an
external pull-down resistor and leaving the LE pin unconnected.
To prevent excessive power dissipation, the resistor should be
1.5 k. When using the ADCMP581 comparators, the latch can
be disabled by connecting the LE pin to GND with an external
450 resistor, and leaving the LE pin disconnected.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADCMP581BCP-R2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| ADCMP581BCP-RL7 | 制造商:Analog Devices 功能描述:Comparator Single ±5.5V 16-Pin LFCSP EP T/R |
| ADCMP581BCP-WP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| ADCMP581BCPZ-R2 | 功能描述:IC COMPARATOR ECL UFAST 16-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
| ADCMP581BCPZ-RL7 | 功能描述:IC COMPARATOR ECL UFAST 16-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 比較器 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 類型:通用 元件數(shù):1 輸出類型:CMOS，推挽式，滿擺幅，TTL 電壓 - 電源，單路/雙路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 電壓 - 輸入偏移（最小值）:5mV @ 5.5V 電流 - 輸入偏壓（最小值）:1pA @ 5.5V 電流 - 輸出（標準）:- 電流 - 靜態(tài)（最大值）:24µA CMRR, PSRR（標準）:80dB CMRR，80dB PSRR 傳輸延遲（最大）:450ns 磁滯:±3mV 工作溫度:-40°C ~ 85°C 封裝/外殼:6-WFBGA，CSPBGA 安裝類型:表面貼裝 包裝:管件 其它名稱:Q3554586 |
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