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參數(shù)資料
| 型號(hào)： | ADDS-2181-EZLITE |
| 英文描述： | EZ-KIT Lite for Analog Devices ADSP-218x DSP Family.(945.78 k) |
| 中文描述： | 的EZ - KIT Lite上為ADI公司的ADSP - 218x DSP系列。（945.78十一） |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 154K |
| 代理商： | ADDS-2181-EZLITE |
ADDS-210xx-TOOLS
REV. B
–7–
ICEPAC
INTERFACE
ICEPAC
(OPTIONAL)
EZ-ICE
(OPTIONAL)
LEDs
PUSHBUTTON
SWITCHES
LINK
PORTS
I
S
LINK
PORTS
ISA
INTERFACE
BOOT ROM
(4MB)
M.A.F.E.
SITE
16-BIT PC/AT
I/O BUS
CONNECTOR
JTAG
HEADER
LINK
CONNECTOR
S
CONTROL I/F
SHARCPAC
MODULE
SITE
LINK
PORTS
LINK
CONNECTOR
Figure 2. ADSP-2106x EZ-LAB Board
E Z-ICE E mulator
Overview
T he ADSP-2106x SHARC EZ-ICE in-circuit emulator provides
a controlled environment for observing, debugging and testing
real-time activities in a target hardware environment by
connecting directly to the target processor through its JT AG
interface. T he emulator monitors system behavior while
running at full speed. It lets you examine and alter memory
locations, including processor registers and stacks.
System Configuration Requirements
T he EZ-ICE Emulator board is a half-size card that installs in
an IBM PC’s 8-bit expansion slot. T he ICEPAC module is
mounted as a daughter card to the EZ-ICE board. And the
T est Access Port (T AP) probe is connected to EZ-ICE board
through a ribbon cable, and to the target processor through its
JT AG interface connector.
T he following minimum PC configuration is required for the
EZ-ICE:
386-based or greater AT with 4 MB DRAM
EGA or VGA graphic card
Hard disk with 2.5 MB available
DOS 3.1 or higher; Windows 3.1 or higher
An available slot for an 8-bit half-size card
Mouse or other pointing device
Graphical User Interface
T he EZ-ICE interface software uses the same GUI interface
design as the simulator software. T his same software works
with the fully configured EZ-ICE board or with the ICEPAC
installed in the EZ-LAB Development Board.
Nonintrusive In-Circuit Emulation
T he EZ-ICE emulator does not affect target loading or timing.
Nonintrusive, in-circuit emulation is assured because EZ-ICE
controls the target system’s processor through its IEEE 1149.1
(JT AG) T est Access Port.
EZ-ICE Target System Requirements
T he ADSP-2106x SHARC EZ-ICE Emulators use the IEEE
1149.1 JT AG test access port of the processors to monitor and
control the target board processor during emulation. T he EZ-
ICE T AP probe requires the CLK IN,
EMU
, T MS, T CK ,
TRST
, T DI, T DO, and GND signals to be accessible on the
target system via a 14-pin connector (pin strip header) such as
that shown in Figure 3.
5
7
9
11
13
14
12
10
8
6
4
2
1
3
EMU
CLKIN
TMS
TCK
TRST
TDI
TDO
GND
BTDI
BTRST
BTCK
BTMS
KEY (NO PIN)
GND
TOP VIEW
Figure 3. Target Board Connector for ADSP-2106x EZ-ICE
(J umpers in Place)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ADDS-2189M-EZLITE | 制造商:Analog Devices 功能描述:Evaluation Development Platform For ADSP-218XM 制造商:Analog Devices 功能描述:SEMICONDUCTORS ((NS)) |
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| ADDS2190 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
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