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REV. A
–3–
ADF4210/ADF4211/ADF4212/ADF4213
Parameter
B Version B Chips
2
Unit
Test Conditions/Comments
POWER SUPPLIES
V
DD
1
V
DD
2
V
P
I
DD
(RF + IF)
6
ADF4210
ADF4211
ADF4212
ADF4213
I
DD
(RF Only)
ADF4210
ADF4211
ADF4212
ADF4213
I
DD
(IF Only)
ADF4210
ADF4211
ADF4212
ADF4213
I
P
(I
P
1 + I
P
2)
Low-Power Sleep Mode
2.7/5.5
V
DD
1
V
DD
1/6.0
2.7/5.5
V
DD
1
V
DD
1/6.0
V min/V max
V min/V max
V
DD
1, V
DD
2 V
DD
1, V
DD
2 6.0 V
11.5
15.0
17.5
20
11.5
15.0
17.5
20
mA max
mA max
mA max
mA max
9.0 mA typical
11.0 mA typical
13.0 mA typical
15 mA typical
6.75
10
12.5
15
6.75
10
12.5
15
mA max
mA max
mA max
mA max
5.0 mA typical
7.0 mA typical
9.0 mA typical
11 mA typical
5.5
5.5
5.5
5.5
1.0
1
5.5
5.5
5.5
5.5
1.0
1
mA max
mA max
mA max
mA max
mA max
μ
A typ
4.5 mA typical
4.5 mA typical
4.5 mA typical
4.5 mA typical
T
A
= 25
°
C, 0.55 mA typical
NOISE CHARACTERISTICS
ADF4213 Phase Noise Floor
7
–171
–164
–171
–164
dBc/Hz typ
dBc/Hz typ
@ 25 kHz PFD Frequency
@ 200 kHz PFD Frequency
@ VCO Output
@ 1 kHz Offset and 200 kHz PFD Frequency
See Note 11
See Note 11
See Note 11
See Note 11
@ 200 Hz Offset and 10 kHz PFD Frequency
@ 1 kHz Offset and 1 MHz PFD Frequency
Phase Noise Performance
8
ADF4210/ADF4211, IF: 540 MHz Output
9
ADF4212/ADF4213, IF: 900 MHz Output
10
ADF4210/ADF4211, RF: 900 MHz Output
10
ADF4212/ADF4213, RF: 900 MHz Output
10
ADF4211/ADF4212, RF: 1750 MHz Output
12
ADF4211/ADF4212, RF: 1750 MHz Output
13
ADF4212/ADF4213, RF: 2400 MHz Output
14
Spurious Signals
ADF4210/ADF4211, IF: 540 MHz Output
9
ADF4212/ADF4213, IF: 900 MHz Output
10
ADF4210/ADF4211, RF: 900 MHz Output
10
ADF4212/ADF4213, RF: 900 MHz Output
10
ADF4211/ADF4212, RF: 1750 MHz Output
12
ADF4211/ADF4212, RF: 1750 MHz Output
13
ADF4212/ADF4213, RF: 2400 MHz Output
14
–91
–89
–89
–91
–85
–67
–88
–91
–89
–89
–91
–85
–67
–88
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
dBc/Hz typ
–88/–90
–90/–94
–90/–94
–90/–94
–80/–82
–65/–70
–80/–82
–88/–90
–90/–94
–90/–94
–90/–94
–80/–82
–65/–70
–80/–82
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
See Note 11
See Note 11
See Note 11
See Note 11
@ 10 kHz/20 kHz and 10 kHz PFD Frequency
@ 200 kHz/400 kHz and 200 kHz PFD Frequency
NOTES
Operating temperature range is as follows: B Version: –40
°
C to +85
°
C.
2
The B Chip specifications are given as typical values.
3
This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the IF/RF input is divided down to a frequency that is
less than this value.
4
V
1 = V
2 = 3 V; For V
1 = V
2 = 5 V, use CMOS-compatible levels, T
A
= 25
°
C.
5
Guaranteed by design. Sample tested to ensure compliance.
6
V
DD
= 3 V; P = 16; RF
IN
= 900 MHz; IF
IN
= 540 MHz, T
A
= 25
°
C.
7
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 logN (where N is the N divider value). See
TPC 16.
8
The phase noise is measured with the EVAL-ADF4210/ADF4212/ADF4213EB Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the
REFIN for the synthesizer (f
= 10 MHz @ 0 dBm).
9
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
IF
= 540 MHz; N = 2700; Loop B/W = 20 kHz.
10
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 900 MHz; N = 4500; Loop B/W = 20 kHz.
11
Same conditions as listed in Note 10.
12
f
REFIN
= 10 MHz; f
PFD
= 200 kHz; Offset frequency = 1 kHz; f
RF
= 1750 MHz; N = 8750; Loop B/W = 20 kHz.
13
f
REFIN
= 10 MHz; f
PFD
= 10 kHz; Offset frequency = 200 Hz; f
RF
= 1750 MHz; N = 175000; Loop B/W = 1 kHz.
14
f
REFIN
= 10 MHz; f
PFD
= 1 MHz; Offset frequency = 1 kHz; f
RF
= 1960 MHz; N = 9800; Loop B/W = 20 kHz.
Specifications subject to change without notice.