參數(shù)資料
型號(hào): ADF4360-1BCPZRL
廠商: Analog Devices Inc
文件頁數(shù): 19/24頁
文件大?。?/td> 0K
描述: IC SYNTHESIZER VCO 24LFCSP
標(biāo)準(zhǔn)包裝: 5,000
類型: 扇出配送,整數(shù)-N,合成器(RF)
PLL:
輸入: CMOS,TTL
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 2.45GHz
除法器/乘法器: 是/無
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 帶卷 (TR)
配用: EVAL-ADF4360-1EBZ1-ND - BOARD EVALUATION FOR ADF4360-1
ADF4360-1
Data Sheet
Rev. C | Page 4 of 24
Parameter
B Version
Unit
Conditions/Comments
NOISE CHARACTERISTICS1, 5
VCO Phase-Noise Performance8
110
dBc/Hz typ
@ 100 kHz offset from carrier.
130
dBc/Hz typ
@ 1 MHz offset from carrier.
141
dBc/Hz typ
@ 3 MHz offset from carrier.
148
dBc/Hz typ
@ 10 MHz offset from carrier.
Synthesizer Phase-Noise Floor9
172
dBc/Hz typ
@ 25 kHz PFD frequency.
163
dBc/Hz typ
@ 200 kHz PFD frequency.
147
dBc/Hz typ
@ 8 MHz PFD frequency.
In-Band Phase Noise10, 11
81
dBc/Hz typ
@ 1 kHz offset from carrier.
RMS Integrated Phase Error12
0.72
Degrees typ
100 Hz to 100 kHz.
Spurious Signals due to PFD Frequency11, 13
70
dBc typ
Level of Unlocked Signal with MTLD Enabled
38
dBm typ
1 Operating temperature range is –40°C to +85°C.
2 Guaranteed by design. Sample tested to ensure compliance.
3 I
CP is internally modified to maintain constant-loop gain over the frequency range.
4 T
A = 25°C; AVDD = DVDD = VVCO = 3.3 V; P = 32.
5 These characteristics are guaranteed for VCO Core Power = 15 mA.
6 Jumping from 2.05 GHz to 2.45 GHz. PFD frequency = 200 kHz; loop bandwidth = 10 kHz.
7 Using 50 resistors to V
VCO into a 50 load. For tuned loads, see the Output Matching section.
8 The noise of the VCO is measured in open-loop conditions.
9 The synthesizer phase-noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider value).
10 The phase noise is measured with the EV-ADF4360-1EB1Z Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REF
IN for the
synthesizer; offset frequency = 1 kHz.
11 f
REFIN = 10 MHz; fPFD = 200 kHz; N = 12500; Loop B/W = 10 kHz.
12 f
REFIN = 10 MHz; fPFD = 1 MHz; N = 2400; Loop B/W = 25 kHz.
13 The spurious signals are measured with the EV-ADF4360-1EB1Z Evaluation Board and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REF
IN for
the synthesizer; fREFOUT = 10 MHz @ 0 dBm.
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