參數(shù)資料
型號: ADF4360-2BCPZRL
廠商: Analog Devices Inc
文件頁數(shù): 4/24頁
文件大?。?/td> 0K
描述: IC SYNTHESIZER VCO 24LFCSP
標(biāo)準(zhǔn)包裝: 5,000
類型: 扇出配送,整數(shù)-N,合成器(RF)
PLL:
輸入: CMOS,TTL
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 2.17GHz
除法器/乘法器: 是/無
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 帶卷 (TR)
配用: EVAL-ADF4360-2EBZ1-ND - BOARD EVALUATION FOR ADF4360-2
ADF4360-2
Data Sheet
Rev. C | Page 12 of 24
LATCH STRUCTURE
Table 6 shows the three on-chip latches for the ADF4360 family. The two LSBs determines which latch is programmed.
Table 6. Latch Structure
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
C2 (0) C1 (0)
PC1
PC2
CR
M1
M2
PDP
CP
CPG
MTLD
PL1
PL2
CPI1
CPI2
CPI3
CPI4
CPI5
CPI6
PD1
M3
CONTROL
BITS
MUXOUT
CONTROL
CURRENT
SETTING 2
CURRENT
SETTING 1
PRESCALER
VALUE
CORE
POWER
LEVEL
OUTPUT
POWER
LEVEL
DB21
DB22
DB23
POWER-
DOWN
2
POWER-
DOWN
1
COUNTER
RESET
MUTE-TILL-
LD
CP
GAIN
CP
THREE-
STATE
PHASE
DETECTOR
POLARITY
PD2
P1
P2
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
C2 (0) C1 (1)
R1
R2
R3
R4
R5
R7
R8
R9
R10
R11
R12
R13
R14
ABP1
ABP2
LDP
TMB
BSC1
R6
CONTROL
BITS
BAND
SELECT
CLOCK
ANTI-
BACKLASH
PULSE
WIDTH
14-BIT REFERENCE COUNTER
DB21
DB22
DB23
LOCK
DETECT
PRECISION
TEST
MODE
BIT
RESERVED
DIVIDE-
BY-2
DIVIDE-BY-
2
SELECT
BSC2
RSV
DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
C2 (1) C1 (0)
A1
A2
A3
A4
A5
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
RSV
CONTROL
BITS
5-BIT A COUNTER
13-BIT B COUNTER
CONTROL LATCH
N COUNTER LATCH
R COUNTER LATCH
DB21
DB22
DB23
CP
GAIN
RESERVED
CPG
DIV2
DIVSEL
04436-016
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