參數(shù)資料
型號(hào)： ADF4360-4BCPZRL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 8/24頁(yè)
文件大小： 0K
描述： IC SYNTHESIZER VCO 24LFCSP
標(biāo)準(zhǔn)包裝： 5,000
類型： 扇出配送，整數(shù)-N，合成器（RF）
PLL： 是
輸入： CMOS，TTL
輸出： 時(shí)鐘
電路數(shù)： 1
比率 - 輸入:輸出： 1:2
差分 - 輸入:輸出： 無(wú)/無(wú)
頻率 - 最大： 1.75GHz
除法器/乘法器： 是/無(wú)
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 24-LFCSP-VQ（4x4）
包裝： 帶卷 (TR)
ADF4360-4
Data Sheet
Rev. B | Page 16 of 24
POWER-UP
Power-Up Sequence
The correct programming sequence for the ADF4360-4 after
power-up is:
1. R counter latch
2. Control latch
3. N counter latch
Initial Power-Up
Initial power-up refers to programming the part after the
application of voltage to the AVDD, DVDD, VVCO, and CE pins. On
initial power-up, an interval is required between programming
the control latch and programming the N counter latch. This
interval is necessary to allow the transient behavior of the
ADF4360-4 during initial power-up to have settled.
During initial power-up, a write to the control latch powers up
the part, and the bias currents of the VCO begin to settle. If
these currents have not settled to within 10% of their steady-
state value, and if the N counter latch is then programmed, the
VCO may not be able to oscillate at the desired frequency,
which does not allow the band select logic to choose the correct
frequency band, and the ADF4360-4 may not achieve lock. If
the recommended interval is inserted, and the N counter latch
is programmed, the band select logic can choose the correct
frequency band, and the part locks to the correct frequency.
The duration of this interval is affected by the value of the
capacitor on the CN pin (Pin 14). This capacitor is used to
reduce the close-in noise of the ADF4360-4 VCO. The recom-
mended value of this capacitor is 10 F. Using this value
requires an interval of ≥ 5 ms between the latching in of the
control latch bits and latching in of the N counter latch bits. If a
shorter delay is required, this capacitor can be reduced. A slight
phase noise penalty is incurred by this change, which is ex-
plained further in Table 10.
Table 10. CN Capacitance vs. Interval and Phase Noise
CN Value
Recommended Interval between Control Latch and N Counter Latch
Open-Loop Phase Noise @ 10 kHz Offset
10 F
≥ 5 ms
87 dBc
440 nF
≥ 600 s
86 dBc
CLOCK
POWER-UP
DATA
LE
R COUNTER
LATCH DATA
CONTROL
LATCH DATA
N COUNTER
LATCH DATA
REQUIRED INTERVAL
CONTROL LATCH WRITE TO
N COUNTER LATCH WRITE
04438-020
Figure 16. ADF4360-4 Power-Up Timing
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參數(shù)描述
ADF4360-4BCPZRL7 功能描述:IC SYNTHESIZER VCO 24LFCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無(wú) 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND
ADF4360-5 制造商:AD 制造商全稱:Analog Devices 功能描述:Integrated Synthesizer and VCO
ADF4360-5BCP 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:INT. SYNTHESIZER & VCO - 1150 - 1400 MHZ - Bulk 制造商:Analog Devices 功能描述:IC SYNTHESIZER PLL
ADF4360-5BCPRL 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP T/R
ADF4360-5BCPRL7 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Single 24-Pin LFCSP EP T/R 制造商:Rochester Electronics LLC 功能描述:INT. SYNTHESIZER & VCO - 1150 - 1400 MHZ - Tape and Reel
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