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參數(shù)資料
| 型號(hào)： | ADG2188YCPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CROSSPOINT SWITCH 8X8 32LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Switch Fundamentals |
| 產(chǎn)品變化通告： | Interface Change Notice 12/Apr/2010 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 交叉點(diǎn)開關(guān) |
| 電路： | 1 x 8:8 |
| 導(dǎo)通狀態(tài)電阻： | 50 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 12V，±15V |
| 電流 - 電源： | 50nA |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 剪切帶 (CT) |
| 配用： | EVAL-ADG2188EBZ-ND - BOARD EVAL FOR ADG2188 |
| 其它名稱： | ADG2188YCPZ-REEL7CT |
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I2C CMOS 8 × 8 Unbuffered Analog
Switch Array with Dual/Single Supplies
ADG2188
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
FEATURES
I2C-compatible interface
3.4 MHz high speed I2C option
32-lead LFCSP_VQ (5 mm × 5 mm)
Double-buffered input logic
Simultaneous update of multiple switches
Up to 300 MHz bandwidth
Fully specified at dual ±5 V/single +12 V operation
On resistance 35 Ω maximum
Low quiescent current < 20 μA
APPLICATIONS
AV switching in TV
Automotive infotainment
AV receivers
CCTV
Ultrasound applications
KVM switching
Telecom applications
Test equipment/instrumentation
PBX systems
GENERAL DESCRIPTION
The ADG2188 is an analog cross point switch with an
array size of 8 × 8. The switch array is arranged so that
there are eight columns by eight rows, for a total of 64
switch channels. The array is bidirectional, and the rows and
columns can be configured as either inputs or outputs. Each
of the 64 switches can be addressed and configured through
the I2C-compatible interface. Standard, full speed, and high
speed (3.4 MHz) I2C interfaces are supported. Any
simultaneous switch combination is allowed. An additional
feature of the ADG2188 is that switches can be updated
simultaneously, using the LDSW command. In addition,
a RESET option allows all of the switch channels to be
reset/off. At power on, all switches are in the off condition.
The device is packaged in a 32-lead, 5 mm × 5 mm
LFCSP_VQ.
FUNCTIONAL BLOCK DIAGRAM
ADG2188
VDD
VSS
VL
SCL
SDA
X0 TO X7 (I/O)
8 × 8 SWITCH ARRAY
LDSW
64
1
64
1
INPUT
REGISTER
AND
7 TO 64
DECODER
LATCHES
LDSW
GND
A0
A1
A2
Y0 TO Y7 (I/O)
0
58
97
-00
1
Figure 1.
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