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參數(shù)資料
| 型號(hào)： | ADG3247BRUZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 12/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SW BUS 2.5/3.3V 16BIT 38TSSOP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 類(lèi)型： | 總線開(kāi)關(guān) |
| 電路： | 8 x 1:1 |
| 獨(dú)立電路： | 2 |
| 電壓電源： | 單電源 |
| 電源電壓： | 2.5V, 3.3V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 38-TFSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 38-TSSOP |
| 包裝： | 管件 |
REV. 0
ADG3247
–9–
BUS SWITCH APPLICATIONS
Mixed Voltage Operation, Level Translation
Bus switches can be used to provide an ideal solution for inter-
facing between mixed voltage systems. The ADG3247 is suitable
for applications where voltage translation from 3.3 V technology to
a lower voltage technology is needed. This device can translate
from 3.3 V to 1.8 V, from 2.5 V to 1.8 V, or bidirectionally from
3.3 V directly to 2.5 V.
Figure 4 shows a block diagram of a typical application in which a
user needs to interface between a 3.3 V ADC and a 2.5 V micro-
processor. The microprocessor may not have 3.3 V tolerant inputs;
therefore placing the ADG3247 between the two devices allows the
devices to communicate easily. The bus switch directly connects
the two blocks, thus introducing minimal propagation delay,
timing skew, or noise.
3.3V ADC
2.5V
3.3V
2.5V
MICROPROCESSOR
ADG3247
3.3V
Figure 4. Level Translation between a 3.3 V ADC
and a 2.5 V Microprocessor
3.3 V to 2.5 V Translation
When VCC is 3.3 V (SEL = VCC) and the input signal range is 0 V
to VCC, the maximum output signal will be clamped to within
a voltage threshold below the VCC supply.
ADG3247
2.5V
3.3V
2.5V
3.3V
Figure 5. 3.3 V to 2.5 V Voltage Translation,
SEL = V
CC
In this case, the output will be limited to 2.5 V, as shown in
Figure 6.
VIN
2.5V
VOUT
0V
3.3V
SWITCH
INPUT
S
WITCH
OU
TPUT
3.3V SUPPLY
SEL = 3.3V
Figure 6. 3.3 V to 2.5 V Voltage Translation,
SEL = V
CC
This device can be used for translation from 2.5 V to 3.3 V
devices and also between two 3.3 V devices.
2.5 V to 1.8 V Translation
When VCC is 2.5 V (SEL = VCC) and the input signal range is 0 V
to VCC, the maximum output signal will, as before, be clamped
to within a voltage threshold below the VCC supply.
ADG3247
1.8V
2.5V
Figure 7. 2.5 V to 1.8 V Voltage Translation,
SEL = V
CC
In this case, the output will be limited to approximately 1.8 V,
as shown in Figure 7.
VIN
1.8V
VOUT
0V
2.5V
SWITCH
INPUT
S
WITCH
OU
TPUT
2.5V SUPPLY
SEL = 2.5V
Figure 8. 2.5 V to 1.8 V Voltage Translation,
SEL = V
CC
3.3 V to 1.8 V Translation
The ADG3247 offers the option of interfacing between a 3.3 V
device and a 1.8 V device. This is possible through use of the
SEL pin.
SEL pin: An active low control pin. SEL activates internal
circuitry in the ADG3247 that allows voltage translation between
3.3 V devices and 1.8 V devices.
ADG3247
1.8V
3.3V
Figure 9. 3.3 V to 1.8 V Voltage Translation,
SEL = 0 V
When VCC is 3.3 V and the input signal range is 0 V to VCC, the
maximum output signal will be clamped to 1.8 V, as shown in
Figure 9. To do this, the
SEL pin must be tied to Logic 0. If
SEL is unused, it should be tied directly to V
CC.
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