VDD Most positive power supply potential.
參數(shù)資料
型號: ADG439FBRZ
廠商: Analog Devices Inc
文件頁數(shù): 4/16頁
文件大?。?/td> 0K
描述: IC MULTIPLEXER DUAL 4X1 16SOIC
產(chǎn)品培訓模塊: iCMOS™ Switches and Multiplexers for Data Acquisition
Switch Fundamentals
標準包裝: 48
功能: 多路復用器
電路: 2 x 4:1
導通狀態(tài)電阻: 270 歐姆
電壓電源: 雙電源
電壓 - 電源,單路/雙路(±): ±15V
電流 - 電源: 50µA
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 16-SOIC N
包裝: 管件
產(chǎn)品目錄頁面: 802 (CN2011-ZH PDF)
ADG438F/ADG439F
Rev. E | Page 12 of 16
TERMINOLOGY
VDD
Most positive power supply potential.
VSS
Most negative power supply potential.
GND
Ground (0 V) reference.
RON
Ohmic resistance between D and S.
ΔRON
ΔRON represents the difference between the RON of any two
channels as a percentage of the maximum RON of those two
channels.
RFLAT (ON)
Flatness is defined as the difference between the maximum and
minimum value of the on resistance measured over the specified
analog signal range and is represented by RFLAT (ON).
Flatness is calculated by
((RMAX RMIN) / RMAX × 100)
RON Drift
Change in RON when temperature changes by one degree Celsius.
IS (Off)
Source leakage current when the switch is off.
ID (Off)
Drain leakage current when the switch is off.
ID, IS (On)
Channel leakage current when the switch is on.
VD (VS)
Analog voltage on Terminal D and Terminal S.
IS (Fault—Power Supplies On)
Source leakage current when exposed to an overvoltage
condition.
ID (Fault—Power Supplies On)
Drain leakage current when exposed to an overvoltage
condition.
IS (Fault—Power Supplies Off)
Source leakage current with power supplies off.
CS (Off)
Channel input capacitance for off condition.
CD (Off)
Channel output capacitance for off condition.
CD, CS (On)
On switch capacitance.
CIN
Digital input capacitance.
tON (EN)
Delay time between the 50% and 90% points of the digital input
and switch on condition.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition.
tTRANSITION
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
tOPEN
Off time measured between 80% points of both switches when
switching from one address state to another.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
Off Isolation
A measure of unwanted signal coupling through an off channel.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
IDD
Positive supply current.
ISS
Negative supply current.
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