VDD Most Positive Power Supply Potential.
參數(shù)資料
型號: ADG508FBRNZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 2/20頁
文件大?。?/td> 0K
描述: IC MULTIPLEXER 8X1 16SOIC
產(chǎn)品培訓(xùn)模塊: Switch Fundamentals
標準包裝: 1,000
功能: 多路復(fù)用器
電路: 1 x 8:1
導(dǎo)通狀態(tài)電阻: 300 歐姆
電壓電源: 雙電源
電壓 - 電源,單路/雙路(±): ±15V
電流 - 電源: 100nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
ADG508F/ADG509F/ADG528F
Rev. E | Page 10 of 20
TERMINOLOGY
VDD
Most Positive Power Supply Potential.
VSS
Most Negative Power Supply Potential.
GND
Ground (0 V) Reference.
RON
Ohmic Resistance between D and S.
RON Drift
Change in RON when temperature changes by one degree
Celsius.
RON Match
Difference between the RON of any two channels.
IS (OFF)
Source leakage current when the switch is off.
ID (OFF)
Drain leakage current when the switch is off.
ID, IS (ON)
Channel leakage current when the switch is on.
VD (VS)
Analog Voltage on Terminals D, S.
CS (OFF)
Channel input capacitance for off condition.
CD (OFF)
Channel output capacitance for off condition.
CD, CS (ON)
On Switch Capacitance.
CIN
Digital Input Capacitance.
tON (EN)
Delay time between the 50% and 90% points of the digital input
and switch on condition.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition.
tTRANSITION
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
tOPEN
“OFF” time measured between 80% points of both switches
when switching from one address state to another.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
Off Isolation
A measure of unwanted signal coupling through an off channel.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
IDD
Positive Supply Current.
ISS
Negative Supply Current.
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