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參數(shù)資料
| 型號： | ADG5234BRUZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH ANALOG 20-TSSOP |
| 標準包裝： | 75 |
| 功能： | 開關 |
| 電路： | 4 x SPDT |
| 導通狀態(tài)電阻： | 170 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 9 V ~ 40 V，±9 V ~ 22 V |
| 電流 - 電源： | 80µA |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 20-TSSOP |
| 包裝： | 管件 |
High Voltage Latch-Up Proof,
Triple/Quad SPDT Switches
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2011 Analog Devices, Inc. All rights reserved.
FEATURES
Latch-up proof
4.5 pF off source capacitance
10 pF off drain capacitance
0.6 pC charge injection
Low on resistance: 160 Ω typical
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
VDD to VSS analog signal range
Human body model (HBM) ESD rating
4 kV I/O port to supplies
1 kV I/O port to I/O port
4 kV all other pins
APPLICATIONS
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
FUNCTIONAL BLOCK DIAGRAMS
S1A
D1
S1B
S3B
D3
S3A
S2B
D2
S2A
ADG5233
IN1 IN2 IN3 EN
LOGIC
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
09
91
9-
00
1
Figure 1. ADG5233 TSSOP and LFCSP_VQ
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
S1A
D1
IN1
S1B
S2B
D2
IN2
S2A
S4A
D4
IN4
S4B
S3B
D3
IN3
S3A
09
91
9-
00
2
Figure 2. ADG5234 TSSOP
GENERAL DESCRIPTION
analog switches comprising three independently selectable
single-pole, double throw (SPDT) switches and four indepen-
dently selectable SPDT switches, respectively.
All channels exhibit break-before-make switching action that
prevents momentary shorting when switching channels. An EN
input on the
(LFCSP and TSSOP packages) is used to
enable or disable the device. When disabled, all channels are
switched off.
The ultralow capacitance and charge injection of these switches
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed coupled with high signal bandwidth make
these devices suitable for video signal switching.
PRODUCT HIGHLIGHTS
1.
Trench Isolation Guards Against Latch-Up.
A dielectric trench separates the P and N channel transistors
thereby preventing latch-up even under severe overvoltage
conditions.
2.
Ultralow Capacitance and 0.6 pC Charge Injection.
3.
Dual-Supply Operation.
For applications where the analog signal is bipolar, the
up to ±22 V.
4.
Single-Supply Operation.
For applications where the analog signal is unipolar, the
power supply up to 40 V.
5.
3 V Logic-Compatible Digital Inputs.
VINH = 2.0 V, VINL = 0.8 V.
6.
No VL Logic Power Supply Required.
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