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參數(shù)資料
| 型號： | ADG528ATQ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTIPLEXER 8X1 18CDIP |
| 產(chǎn)品培訓(xùn)模塊： | Switch Fundamentals |
| 標(biāo)準(zhǔn)包裝： | 21 |
| 功能： | 多路復(fù)用器 |
| 電路： | 1 x 8:1 |
| 導(dǎo)通狀態(tài)電阻： | 700 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 10.8 V ~ 16.5 V，±10.8 V ~ 16.5 V |
| 電流 - 電源： | 600µA |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 18-CDIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 18-CDIP |
| 包裝： | 管件 |
REV. B
–2–
ADG528A/ADG529A–SPECIFICATIONS
DUAL SUPPLY
ADG528A
ADG529A
K Version
B Version
T Version
–40
°C to
–40
°C to
–55
°C to
Parameter
+25
°C +85°C
+25
°C +85°C
+25
°C +125°C
Units
Comments
ANALOG SWITCH
Analog Signal Range
VSS
V min
VDD
V max
RON
280
typ
–10 V
≤ V
S
≤ +10 V, I
DS = 1 mA;
Test Circuit 1
450
600
450
600
450
600
max
300
400
300
400
max
VDD = 15 V (
±10%), V
SS = –15 V (
±10%)
300
400
max
VDD = 15 V (
±5%), V
SS = –15 V (
±5%)
RON Drift
0.6
%/
°C typ –10 V ≤ V
S
≤ +10 V, I
DS = 1 mA
RON Match
5
% typ
–10 V
≤ V
S
≤ +10 V, I
DS = 1 mA
IS (OFF), Off Input
Leakage
0.02
nA typ
V1 =
±10 V, V2 = 10 V; Test Circuit 2
150
1
50
150
nA max
ID (OFF), Off Input
Leakage
0.04
nA typ
V1 =
±10 V, V2 = 10 V; Test Circuit 3
ADG528A
1
100
1
100
1
100
nA max
ADG529A
1
50
1
50
1
50
nA max
ID (ON), On Channel
Leakage
0.04
nA typ
V1 =
±10 V, V2 = 10 V; Test Circuit 4
ADG528A
1
100
1
100
1
100
nA max
ADG529A
1
50
1
50
1
50
nA max
IDIFF, Differential Off
Output Leakage
(ADG529A only)
25
nA max
V1 =
±10 V, V2 = 10 V; Test Circuit 5
DIGITAL CONTROL
VINH, Input High Voltage
2.4
V min
VINL, Input Low Voltage
0.8
V max
IINL or IINH
11
1
A max V
IN = 0 to VDD
CIN Digital Input
Capacitance
8
pF max
DYNAMIC CHARACTERISTICS
1
tTRANSITION
200
ns typ
V1 =
±10 V, V2 = 10 V; Test Circuit 6
300
400
300
400
300
400
ns max
tOPEN
50
ns typ
Test Circuit 7
25
10
25
10
25
10
ns min
tON (EN, WR)
200
ns typ
Test Circuits 8 and 9
300
400
300
400
300
400
ns max
tOFF (EN, RS)
200
ns typ
Test Circuits 8 and 10
300
400
300
400
300
400
ns max
tW Write Pulse Width
100
120
100
120
100
130
ns min
See Figure 1
tS Address,
Enable Setup Time
100
ns min
See Figure 1
tH, Address,
Enable Hold Time
10
ns min
See Figure 1
tRS Reset Pulse Width
100
ns min
See Figure 2
OFF Isolation
68
dB typ
VEN = 0.8 V, RL = 1 k
, C
L = 15 pF,
50
dB min
VS = 7 V rms, f = 100 kHz
CS (OFF)
5
pF typ
VEN = 0.8 V
CD (OFF)
ADG528A
22
pF typ
VEN = 0.8 V
ADG529A
11
pF typ
QINJ, Charge Injection
4
pC typ
RS = 0
, V
S = 0 V; Test Circuit 11
(VDD = +10.8 V to +16.5 V, VSS = –10.8 V to –16.5 V, unless otherwise noted.)
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