REV. A
–10–
ADG608/ADG609
A2
VOUT
VSS
VDD
D
A1
A0
EN
GND
ADG608
RL
1k
VSS
VDD
S1
VS
S2
S8
2.4V
1k
Test Circuit 10. Channel-to-Channel Crosstalk
A2
VOUT
VSS
VDD
D
A1
A0
EN
GND
ADG608
RL
1k
VSS
VDD
S1
VS
S8
Test Circuit 9. OFF Isolation
TERMINOLOGY
VDD
Most positive power supply potential.
VSS
Most negative power supply potential in dual
supplies. In single supply applications, it may
be connected to ground.
GND
Ground (0 V) reference.
RON
Ohmic resistance between D and S.
R
ON
RON variation due to a change in the analog
input voltage with a constant load current.
RON Match
Difference between the RON of any two
channels.
IS (OFF)
Source leakage current when the switch is off.
ID (OFF)
Drain leakage current when the switch is off.
ID, IS (ON)
Channel leakage current when the switch is
on.
VD, VS
Analog voltage on terminals D, S.
CS (OFF)
Channel input capacitance for “OFF”
condition.
CD (OFF)
Channel output capacitance for “OFF”
condition.
CD, CS (ON)
“ON” switch capacitance.
CIN
Digital input capacitance.
tON (EN)
Delay time between the 50% and 90% points
of the digital input and switch “ON”
condition.
tOFF (EN)
Delay time between the 50% and 90% points
of the digital input and switch “OFF”
condition.
tTRANSITION
Delay time between the 50% and 90% points
of the digital inputs and the switch “ON”
condition when switching from one address
state to another.
tOPEN
“OFF” time measured between the 80%
points of both switches when switching from
one address state to another.
VINL
Maximum input voltage for logic “0.”
VINH
Minimum input voltage for logic “1.”
IINL (IINH)
Input current of the digital input.
Crosstalk
A measure of unwanted signal which is
coupled through from one channel to another
as a result of parasitic capacitance.
Off Isolation
A measure of unwanted signal coupling
through an “OFF” channel.
Charge Injection A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
IDD
Positive supply current.
ISS
Negative supply current.