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參數(shù)資料
| 型號： | ADG707BRU-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTIPLEXER DUAL 8X1 28TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Switch Fundamentals |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 功能： | 多路復(fù)用器 |
| 電路： | 2 x 8:1 |
| 導(dǎo)通狀態(tài)電阻： | 4.5 歐姆 |
| 電壓電源： | 單/雙電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.8 V ~ 5.5 V，±2.5 V |
| 電流 - 電源： | 1nA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 帶卷 (TR) |
–6–
REV. A
ADG706/ADG707
TERMINOLOGY
CD (OFF)
“OFF” Switch drain capacitance. Measured
with reference to ground.
CD, CS (ON)
“ON” Switch capacitance. Measured with
reference to ground.
CIN
Digital input capacitance
tTRANSITION
Delay time measured between the 50% and
90% points of the digital inputs and the switch
“ON” condition when switching from one
address state to another
tON (EN)
Delay time between the 50% and 90% points
of the EN digital input and the Switch “ON”
condition
tOFF (EN)
Delay time between the 50% and 90% points
of the EN digital input and the Switch “OFF”
condition
tOPEN
“OFF” Time measured between the 80% points
of both switches when switching from one
address state to another
Charge
Measure of the glitch impulse transferred from
Injection
the digital input to the analog output during
switching
OFF Isolation
Measure of unwanted signal coupling through
an “OFF” switch
Crosstalk
Measure of unwanted signal that is coupled
through from one channel to another as a result
of parasitic capacitance
Bandwidth
Frequency at which the output is attenuated
by 3 dB
ON Response
Frequency response of the “ON” Switch
Insertion
Loss due to the ON Resistance of
Loss
the switch
VDD
Most positive power supply potential
VSS
Most negative power supply in a dual-supply
application. In single-supply applications, this
should be tied to ground at the device.
IDD
Positive supply current
ISS
Negative supply current
GND
Ground (0 V) reference
S
Source terminal. May be an input or output.
DDrain terminal. May be an input or output.
AX
Logic control input
EN
Active high device enable
VD (VS)Analog voltage on terminals D, S
RON
Ohmic resistance between D and S
R
ON
ON Resistance match between any two channels,
i.e., RONmax – RONmin
RFLAT(ON)
Flatness is defined as the difference between the
maximum and minimum value of ON resistance
as measured over the specified analog signal
range.
IS (OFF)
Source leakage current with the Switch “OFF”
ID (OFF)
Drain leakage current with the Switch “OFF”
ID, IS (ON)
Channel leakage current with the Switch “ON”
VINL
Maximum input voltage for Logic “0”
VINH
Minimum input voltage for Logic “1”
IINL(IINH)
Input current of the digital input
CS (OFF)
“OFF” Switch Source Capacitance. Measured
with reference to ground.
Table I. ADG706 Truth Table
A3
A2
A1
A0
EN
ON Switch
XXXX0
NONE
00001
1
00011
2
00101
3
00111
4
01001
5
01011
6
01101
7
01111
8
10001
9
10011
10
10101
11
10111
12
11001
13
11011
14
11101
15
11111
16
X = Don’t Care
Table II. ADG707 Truth Table
A2
A1
A0
EN
ON Switch Pair
XXX
0
NONE
000
1
001
1
2
010
1
3
011
1
4
100
1
5
101
1
6
110
1
7
111
1
8
X = Don’t Care
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