VDD Most Positive Power Supply Potential V<" />
參數(shù)資料
型號: ADG726BSUZ
廠商: Analog Devices Inc
文件頁數(shù): 11/12頁
文件大小: 0K
描述: IC MULTIPLEXER DUAL 16X1 48TQFP
產(chǎn)品培訓(xùn)模塊: iCMOS™ Switches and Multiplexers for Data Acquisition
Switch Fundamentals
標準包裝: 1
功能: 多路復(fù)用器
電路: 2 x 16:1
導(dǎo)通狀態(tài)電阻: 5.5 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 1.8 V ~ 5.5 V,±2.5 V
電流 - 電源: 10µA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
產(chǎn)品目錄頁面: 802 (CN2011-ZH PDF)
REV. 0
–8–
ADG726/ADG732
TERMINOLOGY
VDD
Most Positive Power Supply Potential
VSS
Most Negative Power Supply in a Dual-Supply Application. In single-supply applications, connect to GND.
IDD
Positive Supply Current
ISS
Negative Supply Current
GND
Ground (0 V) Reference
S
Source Terminal. May be an input or output.
DDrain Terminal. May be an input or output.
IN
Logic Control Input
VD (VS)Analog Voltage on Terminals D and S
RON
Ohmic Resistance between D and S
R
ON
On Resistance Match between any two channels, i.e., RONmax – RONmin
RFLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured
over the specified analog signal range.
IS (OFF)
Source Leakage Current with the Switch OFF
ID (OFF)
Drain Leakage Current with the Switch OFF
ID, IS (ON)
Channel Leakage Current with the Switch ON
VINL
Maximum Input Voltage for Logic “0”
VINH
Minimum Input Voltage for Logic “1”
IINL(IINH)
Input Current of the Digital Input
CS (OFF)
OFF Switch Source Capacitance. Measured with reference to ground.
CD (OFF)
OFF Switch Drain Capacitance. Measured with reference to ground.
CD,CS(ON)
ON Switch Capacitance. Measured with reference to ground.
CIN
Digital Input Capacitance
tTRANSITION
Delay Time Measured between the 50% and 90% Points of the Digital Inputs and the Switch ON Condition
when Switching from One Address State to Another
tON(EN)Delay Time between the 50% and 90% Points of the EN Digital Input and the Switch ON Condition
tOFF(EN)Delay Time between the 50% and 90% Points of the EN Digital Input and the Switch OFF Condition
tOPEN
OFF Time Measured between the 80% Points of Both Switches when Switching from One Address State to Another
Charge
A Measure of the Glitch Impulse Transferred from the Digital Input to the Analog Output During Switching
Injection
OFF Isolation
A Measure of Unwanted Signal Coupling through an OFF Switch
Crosstalk
A Measure of Unwanted Signal Coupling from One Channel to Another as a Result of Parasitic Capacitance
ON Response
The Frequency Response of the ON Switch
Insertion
The Loss Due to the On Resistance of the Switch
Loss
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