參數(shù)資料
型號(hào): ADG752BRM
廠商: ANALOG DEVICES INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: CMOS, Low Voltage RF/Video, SPDT Switch
中文描述: 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, PDSO8
封裝: MICRO, SOIC-8
文件頁數(shù): 4/8頁
文件大?。?/td> 131K
代理商: ADG752BRM
REV. 0
ADG752
–4–
Table I. Truth Table
ADG752 IN
Switch S1
Switch S2
0
1
ON
OFF
OFF
ON
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADG752 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= +25
°
C unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . . . –0.3 V to V
DD
+0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . .100 mA
(Pulsed at 1 ms, 10% Duty Cycle Max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
Storage Temperature Range . . . . . . . . . . . . . –65
°
C to +150
°
C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . (T
J
Max–T
A
)/
θ
JA
Junction Temperature (T
J
Max) . . . . . . . . . . . . . . . . . .+150
°
C
μ
SOIC Package
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 206
°
C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 44
°
C/W
SOT-23 Package
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 229.6
°
C/W
θ
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 91.99
°
C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .+215
°
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220
°
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maxi-
mum rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
ORDERING GUIDE
Brand*
Model
Temperature Range
–40
°
C to +85
°
C
–40
°
C to +85
°
C
Package Descriptions
μ
SOIC
SOT-23
Package Options
ADG752BRM
ADG752BRT
SEB
SEB
RM-8
RT-6
*Brand on these packages is limited to three characters due to space constraints.
TERMINOLOGY
V
DD
GND
S
D
IN
R
ON
R
ON
Most positive power supply potential.
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Ohmic resistance between D and S.
On resistance match between channels, i.e.,
R
ON
max–R
ON
min.
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
Source leakage current with the switch “OFF.”
Channel leakage current with the switch “ON.”
Analog voltage on terminals D and S.
“OFF” switch source capacitance.
“ON” switch capacitance.
Delay between applying the digital control
input and the output switching on. See Test
Circuit 4.
Delay between applying the digital control
input and the output switching off.
“OFF” time or “ON” time measured between
the 90% points of both switches, when switch-
ing from one address state to another.
A measure of unwanted signal coupling
through an “OFF” switch.
A measure of unwanted signal that is coupled
through from one channel to another as a
result of parasitic capacitance.
The frequency at which the output is attenu-
ated by –3 dBs.
The frequency response of the “ON” switch.
Loss due to the ON resistance of the switch.
Maximum input voltage for Logic “0.”
Minimum input voltage for Logic “1.”
Input current of the digital input.
Positive supply current.
R
FLAT(ON)
I
S
(OFF)
I
D
, I
S
(ON)
V
D
(V
S
)
C
S
(OFF)
C
D
, C
S
(ON)
t
ON
t
OFF
t
D
Off Isolation
Crosstalk
Bandwidth
On Response
Insertion Loss
V
INL
V
INH
I
INL
(I
INH
)
I
DD
PIN CONFIGURATIONS
8-Lead
m
SOIC
(RM-8)
6-Lead SOT-23
(RT-6)
1
2
3
6
5
4
TOP VIEW
(Not to Scale)
IN
D
V
DD
S1
GND
S2
1
2
3
4
8
7
6
5
(TOP VIEW
NC = NO CONNECT
ADG752
NC
NC
S1
D
V
DD
S2
GND
IN
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