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參數(shù)資料
| 型號： | ADG752BRTZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/9頁 |
| 文件大小： | 0K |
| 描述： | IC VIDEO SWITCH SPDT SOT23-6 |
| 產(chǎn)品培訓(xùn)模塊： | Switch Fundamentals |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 視頻開關(guān) |
| 電路： | 1 x SPDT - NC/NO |
| 導(dǎo)通狀態(tài)電阻： | 18 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.8 V ~ 5.5 V |
| 電流 - 電源： | 1nA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-6 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | ADG752BRTZ-REEL7DKR |
ADG752
–6–
FREQUENCY – MHz
100
ATTENUATION
–
dB
10
1
–8
–4
–2
0
–6
TA = +25 C
Figure 7. On Response vs. Frequency
GENERAL DESCRIPTION
The ADG752 is an SPDT switch constructed using switches in
a T configuration to obtain high “OFF” isolation while main-
taining good frequency response in the “ON” condition.
Figure 8 shows the T-switch configuration. While the switch is
in the OFF state, the shunt switch is closed and the two series
switches are open. The closed shunt switch provides a signal
path to ground for any of the unwanted signals that find their
way through the off capacitances of the series’ MOS devices.
This results in more improved isolation between the input and
output than with an ordinary series switch. When the switch is
in the ON condition, the shunt switch is open and the signal
path is through the two series switches which are now closed.
D
IN
S
SERIES
SHUNT
Figure 8. Basic T-Switch Configuration
LAYOUT CONSIDERATIONS
Where accurate high frequency operation is important, careful
consideration should be given to the printed circuit board layout
and to grounding. Wire wrap boards, prototype boards and
sockets are not recommended because of their high parasitic
inductance and capacitance. The part should be soldered di-
rectly to a printed circuit board. A ground plane should cover all
unused areas of the component side of the board to provide a
low impedance path to ground. Removing the ground planes
from the area around the part reduces stray capacitance.
Good decoupling is important in achieving optimum perfor-
mance. VDD should be decoupled with a 0.1
F surface mount
capacitor to ground mounted as close as possible to the device
itself.
VDD
IN
ADG752
D
S1
S2
75
VOUT
75
CH1
CH2
A = 2
250
75
Figure 9. Multiplexing Between Two Video Signals
REV. A
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