參數(shù)資料
型號: ADG774ABRQ
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: Low Voltage 400 MHz Quad 2:1 Mux with 3 ns Switching Time
中文描述: QUAD 2-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16
封裝: MO-137AB, QSOP-16
文件頁數(shù): 3/8頁
文件大小: 119K
代理商: ADG774ABRQ
–3–
REV. 0
ADG774
B Version
T
MIN
to
T
MAX
Parameter
+25
8
C
Units
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
0 V to V
DD
V
typ
max
4
V
D
= 0 V to V
DD
, I
S
= –10 mA
8
On Resistance Match Between
Channels (
R
ON
)
0.15
typ
max
typ
max
V
D
= 0 V to V
DD
, I
S
= –10 mA
0.5
On Resistance Flatness (R
FLAT(ON)
)
2
V
D
= 0 V to V
DD
, I
S
= –10 mA
4
LEAKAGE CURRENTS
Source OFF Leakage I
S
(OFF)
±
0.01
±
0.5
±
0.01
±
0.5
±
0.01
±
0.5
nA typ
nA max
nA typ
nA max
nA typ
nA max
V
D
= 3 V, V
S
= 1 V; V
D
= 1 V, V
S
= 3 V;
Test Circuit 2
V
D
= 3 V, V
S
= 1 V; V
D
= 1 V, V
S
= 3 V;
Test Circuit 2
V
D
= V
S
= 3 V; V
D
= V
S
= 1 V; Test Circuit 3
±
1
Drain OFF Leakage I
D
(OFF)
±
1
Channel ON Leakage I
D
, I
S
(ON)
±
1
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
INL
or I
INH
2.0
0.4
V min
V max
0.001
μ
A typ
μ
A max
V
IN
= V
INL
or V
INH
±
0.5
DYNAMIC CHARACTERISTICS
2
t
ON
12
25
5
10
5
1
–65
–75
240
2
3
10
20
30
ns typ
ns max
ns typ
ns max
ns typ
ns min
dB typ
dB typ
MHz typ
% typ
pC typ
pF typ
pF typ
pF typ
R
L
= 100
, C
L
= 35 pF,
V
S
= +1.5 V; Test Circuit 4
R
L
= 100
, C
L
= 35 pF,
V
S
= +1.5 V; Test Circuit 4
R
L
= 100
, C
L
= 35 pF,
V
S1
= V
S2
= 3 V; Test Circuit 5
R
L
= 50
, f = 10 MHz; Test Circuit 7
R
L
= 50
, f = 10 MHz; Test Circuit 8
R
L
= 50
; Test Circuit 6
R
L
= 50
C
L
= 1 nF; Test Circuit 9
f = 1 kHz
f = 1 kHz
f = 1 MHz
t
OFF
Break-Before-Make Time Delay, t
D
Off Isolation
Channel-to-Channel Crosstalk
Bandwidth –3 dB
Distortion
Charge Injection
C
S
(OFF)
C
D
(OFF)
C
D
, C
S
(ON)
POWER REQUIREMENTS
V
DD
= +3.3 V
Digital Inputs = 0 V or V
DD
I
DD
1
μ
A max
μ
A typ
μ
A typ
mA max
0.001
I
IN
I
O
1
100
V
IN
= +3 V
V
S
/V
D
= 0 V
NOTES
1
Temperature ranges are as follows: B Version, –40
°
C to +85
°
C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(V
DD
= +3 V
6
10%, GND = 0 V. All specifications T
MIN
to T
MAX
unless otherwise noted.)
SINGLE SUPPLY
Table I. Truth Table
EN
IN
D1
D2
D3
D4
Function
1
0
0
X
0
1
Hi-Z
S1A
S1B
Hi-Z
S2A
S2B
Hi-Z
S3A
S3B
Hi-Z
S4A
S4B
DISABLE
IN = 0
IN = 1
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