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ADG784
–4–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG784 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
(TA = 25
°C unless otherwise noted.)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Analog, Digital Inputs
2
. . . . . . . . . . –0.3 V to VDD + 0.3 V or
30 mA, Whichever Occurs First
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . –40
°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65
°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
°C
Chip Scale Package
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 32°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 215
°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220
°C
ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability. Only one absolute
maximum rating may be applied at any one time.
2Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
PIN CONFIGURATION
TERMINOLOGY
VDD
Most Positive Power Supply Potential.
GND
Ground (0 V) Reference.
S
Source Terminal. May be an input or output.
D
Drain Terminal. May be an input or output.
IN
Logic Control Input.
EN
Logic Control Input.
RON
Ohmic resistance between D and S.
ΔRON
On Resistance match between any two channels
i.e., RON max – RON min.
RFLAT(ON)
Flatness is defined as the difference between
the maximum and minimum value of on resis-
tance as measured over the specified analog
signal range.
IS (OFF)
Source Leakage Current with the switch “OFF.”
ID (OFF)
Drain Leakage Current with the switch “OFF.”
ID, IS (ON)
Channel Leakage Current with the switch “ON.”
VD (VS)
Analog Voltage on Terminals D, S.
CS (OFF)
“OFF” Switch Source Capacitance.
CD (OFF)
“OFF” Switch Drain Capacitance.
CD, CS (ON) “ON” Switch Capacitance.
tON
Delay between applying the digital control input
and the output switching on. See Test Circuit 4.
tOFF
Delay between applying the digital control input
and the output switching Off.
tD
“OFF” time or “ON” time measured between
the 90% points of both switches, when switching
from one address state to another. See Test
Circuit 5.
Crosstalk
A measure of unwanted signal that is coupled
through from one channel to another as a result
of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through an
“OFF” switch.
Bandwidth
Frequency response of the switch in the ON
state measured at 3 dB down.
Distortion
RFLAT(ON)/RL
REV. A
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO SUBSTRATE, GND.
14
13
12
1
3
4
S4B
15 S4A
D4
S3A
11 S3B
S1A
D1
2
S1B
S2A
5
S2B
7
NC
6
D2
8
GND
9
NC
10
D3
19
NC
20
IN
18
V
DD
17
NC
16
EN
ADG784
TOP VIEW
(Not to Scale)