![](http://datasheet.mmic.net.cn/Analog-Devices-Inc/ADG786BCPZ_datasheet_96163/ADG786BCPZ_10.png)
REV.
ADG786/ADG788
–10–
* IN1–4 for ADG734
GND
VDD
ADG786/
ADG788
VOUT
CL
1nF
VS
RS
D
S
VDD
VSS
VIN
EN*
VOUT
3V
VOUT
LOGIC
INPUT (VIN)
QINJ = CL
VOUT
0V
Test Circuit 7. Charge Injection
VS
VOUT
50
NETWORK
ANALYZER
RL
50
IN
GND
VIN
S
D
50
OFF ISOLATION = 20 LOG
VOUT
VS
VDD
0.1 F
VDD
VSS
0.1 F
VSS
Test Circuit 8. OFF Isolation
CHANNEL-TO-CHANNEL
CROSSTALK = 20 LOG
GND
VDD
0.1 F
VDD
VSS
0.1 F
VSS
SA
D
SB
VS
VOUT
NETWORK
ANALYZER
RL
50
IN
VOUT
VS
50
R
50
Test Circuit 9. Channel-to-Channel Crosstalk
Power Supply Sequencing
When using CMOS devices, care must be taken to ensure cor-
rect power supply sequencing. Incorrect sequencing can result
in the device being subjected to stresses beyond those maximum
ratings listed in the data sheet. Digital and analog inputs should
be applied to the device after supplies and ground. In dual sup-
ply applications, if digital and analog inputs may be applied
prior to VDD and VSS supplies, the addition of a Schottky diode
connected between VSS and GND will ensure that the device
powers on correctly. For single supply applications, VSS should
be tied to GND as close to the device as possible.
VS
VOUT
50
NETWORK
ANALYZER
RL
50
IN
GND
VIN
S
D
INSERTION LOSS = 20 LOG
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
VDD
0.1 F
VDD
VSS
0.1 F
VSS
Test Circuit 10. Bandwidth
B