VDD = 5 V ± 10%, GND = 0 V, T
參數(shù)資料
型號(hào): ADG795GBCPZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 18/24頁
文件大?。?/td> 0K
描述: IC MUX/DEMUX 2X1 24LFCSP
產(chǎn)品變化通告: ADG79xx Discontinuance Notice 17/Aug/2010
標(biāo)準(zhǔn)包裝: 1
功能: 多路復(fù)用器/多路分解器
電路: 5 x 2:1
導(dǎo)通狀態(tài)電阻: 4 歐姆
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 3V,5V
電流 - 電源: 1nA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 24-LFCSP-VQ(4x4)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ADG795GBCPZ-REELDKR
ADG795A/ADG795G
Rev. 0 | Page 3 of 24
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V, TA = 40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ1
Max
Unit
ANALOG SWITCH
Analog Signal Range2
VS = VDD, RL = 1 MΩ
0
4
V
VS = VDD, RL = 75 Ω
0
3.3
V
On Resistance, RON
VD = 0 V, IDS = 10 mA, see Figure 22
2.2
3.5
Ω
VD = 0 V to 1 V, IDS = 10 mA, see Figure 22
4
Ω
On-Resistance Matching Between
Channels, RON
VD = 0 V, IDS = 10 mA
0.15
0.5
Ω
VD = 1 V, IDS = 10 mA
0.6
Ω
On-Resistance Flatness, RFLAT(ON)
VD = 0 V to 1 V, IDS = 10 mA
0.3
0.55
Ω
LEAKAGE CURRENTS
Source Off Leakage (IS(OFF))
VD = 4 V/1 V, VS = 1 V/4 V, see Figure 23
±0.25
nA
Drain Off Leakage (ID(OFF))
VD = 4 V/1 V, VS = 1 V/4 V, see Figure 23
±0.25
nA
Channel On Leakage (ID(ON), IS(ON))
VD = VS = 4 V/1 V, see Figure 24
±0.25
nA
DYNAMIC CHARACTERISTICS3
tON, tENABLE
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28
186
250
ns
tOFF, tDISABLE
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28
177
240
ns
Break-Before-Make Time Delay, tD
CL = 35 pF, RL = 50 Ω, VS1 = VS2 = 2 V, see Figure
1
3
ns
I2C-to-GPO Propagation Delay, tH, tL
ADG795G only
130
ns
Off Isolation
f = 10 MHz, RL = 50 Ω, see Figure 26
60
dB
Channel-to-Channel Crosstalk
f = 10 MHz, RL = 50 Ω, see Figure 27
Same Multiplexer
55
dB
Different Multiplexer
70
dB
3 dB Bandwidth
RL = 50 Ω, see Figure 25
325
MHz
THD + N
RL = 100 Ω
0.14
%
Charge Injection
CL = 1 nF, VS = 0 V, see Figure 30
5
pC
CS(OFF)
10
pF
CD(OFF)
13
pF
CD(ON), CS(ON)
27
pF
Power Supply Rejection Ratio, PSRR
f = 20 kHz
70
dB
Differential Gain Error
CCIR330 test signal
0.32
%
Differential Phase Error
CCIR330 test signal
0.44
Degrees
LOGIC INPUTS3
A0, A1, A2
Input High Voltage, VINH
2.0
V
Input Low Voltage, VINL
0.8
V
Input Current, IINL or IINH
VIN = 0 V to VDD
0.005
±1
μA
Input Capacitance, CIN
3
pF
SCL, SDA
Input High Voltage, VINH
0.7 × VDD
VDD + 0.3
V
Input Low Voltage, VINL
0.3
+0.3 × VDD
V
Input Leakage Current, IIN
VIN = 0 V to VDD
0.005
±1
μA
Input Hysteresis
0.05 × VDD
V
Input Capacitance, CIN
3
pF
OBSOLETE
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