ADG795A/ADG795G
Rev. 0 | Page 3 of 24
SPECIFICATIONS
VDD = 5 V ± 10%, GND = 0 V, TA = 40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Max
Unit
ANALOG SWITCH
VS = VDD, RL = 1 MΩ
0
4
V
VS = VDD, RL = 75 Ω
0
3.3
V
On Resistance, RON
2.2
3.5
Ω
4
Ω
On-Resistance Matching Between
Channels, RON
VD = 0 V, IDS = 10 mA
0.15
0.5
Ω
VD = 1 V, IDS = 10 mA
0.6
Ω
On-Resistance Flatness, RFLAT(ON)
VD = 0 V to 1 V, IDS = 10 mA
0.3
0.55
Ω
LEAKAGE CURRENTS
Source Off Leakage (IS(OFF))
±0.25
nA
Drain Off Leakage (ID(OFF))
±0.25
nA
Channel On Leakage (ID(ON), IS(ON))
±0.25
nA
tON, tENABLE
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28 186
250
ns
tOFF, tDISABLE
CL = 35 pF, RL = 50 Ω, VS = 2 V, see Figure 28 177
240
ns
Break-Before-Make Time Delay, tD
CL = 35 pF, RL = 50 Ω, VS1 = VS2 = 2 V, see Figure 1
3
ns
I2C-to-GPO Propagation Delay, tH, tL
ADG795G only
130
ns
Off Isolation
60
dB
Channel-to-Channel Crosstalk
Same Multiplexer
55
dB
Different Multiplexer
70
dB
3 dB Bandwidth
325
MHz
THD + N
RL = 100 Ω
0.14
%
Charge Injection
5
pC
CS(OFF)
10
pF
CD(OFF)
13
pF
CD(ON), CS(ON)
27
pF
Power Supply Rejection Ratio, PSRR
f = 20 kHz
70
dB
Differential Gain Error
CCIR330 test signal
0.32
%
Differential Phase Error
CCIR330 test signal
0.44
Degrees
A0, A1, A2
Input High Voltage, VINH
2.0
V
Input Low Voltage, VINL
0.8
V
Input Current, IINL or IINH
VIN = 0 V to VDD
0.005
±1
μA
Input Capacitance, CIN
3
pF
SCL, SDA
Input High Voltage, VINH
0.7 × VDD
VDD + 0.3
V
Input Low Voltage, VINL
0.3
+0.3 × VDD
V
Input Leakage Current, IIN
VIN = 0 V to VDD
0.005
±1
μA
Input Hysteresis
0.05 × VDD
V
Input Capacitance, CIN
3
pF
OBSOLETE