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參數(shù)資料
| 型號(hào)： | ADG836YRM-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 14/16頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH DUAL SPDT 10MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Switch Fundamentals |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 功能： | 開關(guān) |
| 電路： | 2 x SPDT - NC/NO |
| 導(dǎo)通狀態(tài)電阻： | 650 毫歐 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 1.65 V ~ 3.6 V |
| 電流 - 電源： | 3nA |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
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ADG836
Rev. A | Page 7 of 16
PIN CONFIGURATIONS
IN1
1
S1A
2
GND
3
S2A
4
IN2
5
D1
10
S1B
9
VDD
8
S2B
7
D2
6
ADG836
TOP VIEW
(Not to Scale)
04308-002
Figure 2. 10-Lead MSOP (RM-10)
PIN 1
INDICATOR
NC = NO CONNECT
1
S1A
2
GND
3
S2A
9 S1B
8VDD
7 S2B
4
N
C
5
IN
2
6
D
2
1
2
N
C
1
N
1
0
D
1
TOP VIEW
(Not to Scale)
ADG836
04308-003
Figure 3. 12-Lead LFCSP (CP-12)
Table 6. Terminology
VDD
Most positive power supply potential.
IDD
Positive supply current.
GND
Ground (0 V) reference.
S
Source terminal. May be an input or output.
D
Drain terminal. May be an input or output.
IN
Logic control input.
VD (VS)
Analog voltage on terminals D, S.
RON
Ohmic resistance between D and S.
RFLAT (ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the
specified analog signal range.
RON
On resistance match between any two channels.
IS (OFF)
Source leakage current with the switch off.
ID (OFF)
Drain leakage current with the switch off.
ID, IS (ON)
Channel leakage current with the switch on.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL (IINH)
Input current of the digital input.
CS (OFF)
Off switch source capacitance. Measured with reference to ground.
CD (OFF)
Off switch drain capacitance. Measured with reference to ground.
CD, CS (ON)
On switch capacitance. Measured with reference to ground.
CIN
Digital input capacitance.
tON
Delay time between the 50% and the 90% points of the digital input and switch on condition.
tOFF
Delay time between the 50% and the 90% points of the digital input and switch off condition.
tBBM
On or off time measured between the 80% points of both switches when switching from one to another.
Charge Injection
A measure of the glitch impulse transferred from the digital input to the analog output during on-off switching.
Off Isolation
A measure of unwanted signal coupling through an off switch.
Crosstalk
A measure of unwanted signal, which is coupled through from one channel to another, as a result of parasitic
capacitance.
3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
On Response
The frequency response of the on switch.
Insertion Loss
The loss due to the on resistance of the switch.
THD + N
The ratio of the harmonics amplitude plus noise of a signal to the fundamental.
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