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| 型號： | ADL5306ACPZ-R2 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QCC16 |
| 封裝： | 3 X 3 MM, MO-220VEED-2, LFCSP-16 |
| 文件頁數(shù)： | 16/16頁 |
| 文件大?。?/td> | 1015K |
| 代理商： | ADL5306ACPZ-R2 |
ADL5306
GENERAL STRUCTURE
The ADL5306 addresses a wide variety of interfacing conditions
to meet the needs of fiber optic supervisory systems, and is
useful in many nonoptical applications. This section explains
the structure of this unique style of translinear log amp. The
simplified schematic in Figure 21 shows the key elements.
Q2
Q1
451
14.2k
80k
20k
6.69k
PHOTODIODE
INPUT
CURRENT
BIAS
GENERATOR
TEMPERATURE
COMPENSATION
(SUBTRACT AND
DIVIDE BY T°K)
2.5V
COMM
VLOG
VNEG (NORMALLY GROUNDED)
VSUM
INPT
VREF
IREF
IREF
VBE1
VBE2
IPD
VBE1
VBE2
44
A/dec
2.5V
0.5V
03727-0-021
Figure 21. Simplified Schematic
The photodiode current IPD is received at Pin INPT. The voltage
at this node is essentially equal to the voltage on the two
adjacent guard pins, VSUM and IREF, due to the low offset
voltage of the JFET op amp. Transistor Q1 converts IPD to a
corresponding logarithmic voltage, as shown in Equation 1. A
finite positive value of VSUM is needed to bias the collector of Q1
for the usual case of a single-supply voltage. This is internally
set to 0.5 V, one fifth of the 2.5 V reference voltage appearing on
Pin VREF. The resistance at the VSUM pin is nominally 16 k;
this voltage is not intended as a general bias source.
The ADL5306 also supports the use of an optional negative
supply voltage, VN , at Pin VNEG. When VN is –0.5 V or more
negative, VSUM may be connected to ground; thus, INPT and
IREF assume this potential. This allows operation as a voltage-
input logarithmic converter by the inclusion of a series resistor
at either or both inputs. Note that the resistor setting, IREF, will
need to be adjusted to maintain the intercept value. It should
also be noted that the collector-emitter voltages of Q1 and Q2
are now the full VN, and effects due to self-heating will cause
errors at large input currents.
The input-dependent VBE1 of Q1 is compared with the reference
VBE2 of a second transistor, Q2, operating at IREF. This is
generated externally to a recommended value of 10 A.
However, other values over a several-decade range can be used
with a slight degradation in law conformance (see Figure 8).
THEORY
The base-emitter voltage of a BJT (bipolar junction transistor)
can be expressed by the following equation, which immediately
shows its basic logarithmic nature:
VBE = kT/q ln(IC / IS)
(1)
where:
IC is the collector current
IS is a scaling current, typically only 10–17 A
kT/q is the thermal voltage, proportional to absolute
temperature (PTAT), and is 25.85 mV at 300 K.
IS is never precisely defined and exhibits an even stronger
temperature dependence, varying by a factor of roughly a
billion between –35°C and +85°C. Thus, to make use of the BJT
as an accurate logarithmic element, both of these temperature-
dependencies must be eliminated.
The difference between the base-emitter voltages of a matched
pair of BJTs, one operating at the photodiode current IPD and
the other operating at a reference current IREF, can be written as
VBE1 – VBE2 = kT/q ln(IPD / IS) – kT/q ln(IREF / IS)
= ln(10) kT/q log10(IPD /IREF)
(2)
= 59.5 mV log10(IPD /IREF) (T = 300 K)
The uncertain, temperature-dependent saturation current, IS,
that appears in Equation 1 has therefore been eliminated. To
eliminate the temperature variation of kT/q, this difference
voltage is processed by what is essentially an analog divider.
Effectively, it puts a variable under Equation 2. The output of
this process, which also involves a conversion from voltage
mode to current mode, is an intermediate, temperature-
corrected current:
ILOG = IY log10(IPD / IREF)
(3)
where IY is an accurate, temperature-stable scaling current that
determines the slope of the function (change in current per
decade). For the ADL5306, IY is 44 A, resulting in a
temperature-independent slope of 44 A/decade for all values
of IPD and IREF . This current is subsequently converted back to a
voltage-mode output, VLOG, scaled 200 mV/decade.
Rev. 0 | Page 9 of 16
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參數(shù)描述 |
|---|---|
| ADL5306ACPZ-REEL7 | 功能描述:IC CONV LOGARITHMIC 60DB 16LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| ADL5306-EVAL | 制造商:Analog Devices 功能描述:Evaluation Board For IC Log Amp Single 5.5V 制造商:Analog Devices 功能描述:LOG AMP SGL 5.5V - Bulk |
| ADL5310 | 制造商:AD 制造商全稱:Analog Devices 功能描述:120 dB Range (3 nA to 3 mA) Dual Logarithmic Converter |
| ADL5310ACP | 制造商:Rochester Electronics LLC 功能描述:LOGARITHMIC CONVERTER - Bulk |
| ADL5310ACP-R2 | 功能描述:IC LOGARITHMIC CONV DUAL 24LFCSP RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:可變增益放大器 應(yīng)用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
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