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參數(shù)資料
| 型號： | ADM1025ARQ |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 7/19頁 |
| 文件大小： | 0K |
| 描述： | IC MONITOR SYS/VOLT 5CH 16QSOP |
| 產(chǎn)品變化通告： | MFG CHG Notification ADI to ON Semi LTB Notification |
| 標(biāo)準(zhǔn)包裝： | 98 |
| 應(yīng)用： | PC，PDA |
| 接口： | I²C |
| 電源電壓： | 3 V ~ 5.5 V |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-QSOP |
| 包裝： | 管件 |
| 安裝類型： | 表面貼裝 |
ADM1025, ADM1025A
http://onsemi.com
15
the Test Register to 1, setting Bit 6 of the VID Register to 1,
and clearing Bit 7 of the VID Register.
Starting Conversion
The monitoring function of the ADM1025/ADM1025A is
started by writing to the Configuration Register and setting
Start (Bit 0) high. Limit values should be written into the
Limit Registers before starting the ADC to avoid spurious
out-of-limit conditions. The time taken to complete the
analog measurements depends on how they are configured,
as described elsewhere. Once the measurements have been
completed, the results can be read from the Value Registers
at any time.
Reduced Power and Shutdown Mode
The ADM1025/ADM1025A can be placed in a low power
mode by setting Bit 0 of the Configuration Register to 0.
This disables the internal ADC. Full shutdown mode may
then be achieved by setting Bit 7 of the VID Register to 1 and
Bit 0 of the Test Register to 1. This turns off power to all
analog circuits and stops the monitoring cycle, if running,
but it does not affect the condition of any of the registers. The
device will return to its previous state when these bits are
reset to zero.
5 V Operation
The ADM1025/ADM1025A may be operated with VCC
connected to any supply voltage between 3.0 V and 5.5 V,
but it should be noted that the device has been optimized for
3.3 V operation. In particular, the internal voltage divider
used to measure the supply voltage is optimized for 3.3 V.
Powering the device from 5 V will cause the VCC Reading
Register (Register 25h) to overrange. In this case, the 5 V
measurement should be read from the 5 V Reading Register
(Register 23h), instead of the VCC Reading Register. Note
also that when the 12 VIN/VID4 pin is programmed to read
VID4, due to its internal voltage divider, it will only read
VIH = 2.1 V on the 12 VIN/VID4 pin as logic high if the
device is being powered from the 3.3 V supply.
REGISTERS
Table 9. ADDRESS POINTER REGISTER
Bit
Name
R/W
Description
7–0
Address Pointer
Write
Address of ADM1025/ADM1025A Registers. See the tables below for detail.
Table 10. LIST OF REGISTERS
Register Name
Address A7A0 in Hex
Power On Value of Registers: <7:0>
Configuration Register
40h
0000 1000
Status Register 1
41h
0000 0000
Status Register 2
42h
0000 0000
VID Register
47h
<7:4> = 0000, <3:0> = VID3–VID0
VID4 Register
49h
<0> = VID4; Default = 1000 000 (VID4)
Value and Limit Registers
15–3Dh
Company ID
3Eh
0100 0001
Stepping
3Fh
0010 (Bits 3:0 Version Number)
Table 11. REGISTER 40h CONFIGURATION REGISTER
Bit
Name
R/W
Description
0
START
Read/Write
Logic 1 enables start-up of monitor ASIC, and Logic 0 places the ASIC in
standby mode. At start-up, limit checking functions and scanning begins.
Note, all HIGH and LOW LIMITS should be set into the
ADM1025/ADM1025A prior to turning on this bit. (Power-up Default = 0.)
1
Reserved
Read
2
Reserved
Read
3
Reserved
Read
4
RESET
Read/Write
Setting this bit generates a minimum 20 ms low pulse on Pin 16 if the
function is enabled.
5
+12/VID4 Select
Read/Write
Selects whether Pin 11 acts as a 12 V analog input monitoring pin, or as a
VID[4] input. This pin defaults to the 12 V analog input. (Default = 0.)
6
Reserved
Read
7
Initialization
Read/Write
Logic 1 restores power-up default values to the Configuration Register and
Status Registers. This bit automatically clears itself and the power-on
default is zero.
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