參數(shù)資料
型號: ADM207EARU
廠商: Analog Devices Inc
文件頁數(shù): 2/20頁
文件大?。?/td> 0K
描述: IC TXRX RS232 5DVR/3REC 24TSSOP
標(biāo)準(zhǔn)包裝: 62
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 5/3
規(guī)程: RS232
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
ADM206E/ADM207E/ADM208E/ADM211E/ADM213E
Rev. E | Page 10 of 20
THEORY OF OPERATION
The ADM206E/ADM207E/ADM208E/ADM211E/ADM213E
are ruggedized RS-232 line drivers/receivers that operate from a
single 5 V supply. Step-up voltage converters coupled with level
shifting transmitters and receivers allow RS-232 levels to be
developed while operating from a single 5 V supply.
Features include low power consumption, high transmission
rates, and compliance with the EU directive on EMC, which
includes protection against radiated and conducted interfere-
ence, including high levels of electrostatic discharge.
All RS-232 inputs and outputs contain protection against
electrostatic discharges up to ±15 kV and electrical fast tran-
sients up to ±2 kV. This ensures compliance to IEC 100042
and IEC 100044 requirements.
The devices are ideally suited for operation in electrically harsh
environments or where RS-232 cables are plugged/unplugged
frequently. They are also immune to high RF field strengths
without special shielding precautions.
Emissions are also controlled to within very strict limits.
TTL/CMOS technology is used to keep the power dissipation to
an absolute minimum, allowing maximum battery life in
portable applications. The ADM2xxE is a modification,
enhancement, and improvement to the ADM2xx family and its
derivatives. It is essentially plug-in compatible and does not
have materially different applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of four main sections:
A charge pump voltage converter.
5 V logic to EIA-232 transmitters.
EIA-232 to 5 V logic receivers.
Transient protection circuit on all I/O lines.
Charge Pump DC-to-DC Voltage Converter
The charge pump voltage converter consists of a 200 kHz
oscillator and a switching matrix. The converter generates a
±10 V supply from the input 5 V level. This is done in two
stages using a switched capacitor technique as illustrated in
Figure 20 and Figure 21. First, the 5 V input supply is doubled
to 10 V using Capacitor C1 as the charge storage element. The
10 V level is then inverted to generate 10 V using C2 as the
storage element.
Capacitor C3 and Capacitor C4 are used to reduce the output
ripple. If desired, larger capacitors (up to 47 μF) can be used for
Capacitor C1 to Capacitor C4. This facilitates direct substitution
with older generation charge pump RS-232 transceivers.
The V+ and V– supplies can also be used to power external
circuitry, if the current requirements are small (see the Typical
+
VCC
GND
S1
S2
C1
S3
S4
C3
V+ = 2VCC
VCC
INTERNAL
OSCILLATOR
00
06
8-
020
Figure 20. Charge Pump Voltage Doubler
FROM
VOLTAGE
DOUBLER
+
V+
GND
S1
S2
C2
S3
S4
C4
GND
V– = –(V+)
INTERNAL
OSCILLATOR
00
06
8-
021
Figure 21. Charge Pump Voltage Inverter
Transmitter (Driver) Section
The drivers convert 5 V logic input levels into EIA-232 output
levels. With VCC = 5 V and driving an EIA-232 load, the output
voltage swing is typically ±9 V.
Unused inputs can be left unconnected, as an internal 400 kΩ
pull-up resistor pulls them high, forcing the outputs into a low
state. The input pull-up resistors typically source 8 μA when
grounded, so unused inputs should either be connected to VCC
or left unconnected in order to minimize power consumption.
Receiver Section
The receivers are inverting level shifters that accept EIA-232 input
levels and translate them into 5 V logic output levels. The inputs
have internal 5 kΩ pull-down resistors to ground and are
protected against overvoltages of up to ±25 V. The guaranteed
switching thresholds are 0.4 V minimum and 2.4 V maximum.
Unconnected inputs are pulled to 0 V by the internal 5 kΩ pull-
down resistor. This, therefore, results in a Logic 1 output level for
unconnected inputs or for inputs connected to GND.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.65 V. This ensures error-free reception for both noisy
inputs and for inputs with slow transition times.
ENABLE AND SHUTDOWN
Table 3 and Table 4 are truth tables for the enable and shutdown
control signals. The enable function is intended to facilitate data
bus connections where it is desirable to tristate the receiver
outputs. In the disabled mode, all receiver outputs are placed in
a high impedance state. The shutdown function is intended to
shut down the device, thereby minimizing the quiescent
current. In shutdown, all transmitters are disabled and all
receivers on the ADM211E are tristated.
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