(VCC = 5 V 10%. C1–C4 = 0.1 F; all" />
參數(shù)資料
型號: ADM222AR
廠商: Analog Devices Inc
文件頁數(shù): 4/11頁
文件大?。?/td> 0K
描述: IC TX/RX RS-232 5V W/SD 18SOIC
標準包裝: 41
類型: 收發(fā)器
驅動器/接收器數(shù): 2/2
規(guī)程: RS232
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 18-SOIC(0.295",7.50mm 寬)
供應商設備封裝: 18-SOIC
包裝: 管件
REV.
–2–
ADM222/ADM232A/ADM242–SPECIFICATIONS
(VCC = 5 V
10%. C1–C4 = 0.1
F; all spec-
ifications TMIN to TMAX unless otherwise noted.)
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
RS-232 TRANSMITTERS
Output Voltage Swing
±5
±9
V
All Transmitter Outputs Loaded with
3 k
to Ground
Input Logic Threshold Low, VINL
1.7
0.8
V
TIN
Input Logic Threshold High, VINH
2.4
1.7
V
TIN
Logic Pull-Up Current
12
40
ATIN = 0 V
Data Rate
200
kB/s
Output Resistance
300
VCC = V+ = V– = 0 V, VOUT =
±2 V
Output Short Circuit Current (Instantaneous)
±10
mA
RS-232 RECEIVERS
RS-232 Input Voltage Range
–30
+30
V
RS-232 Input Threshold Low
0.8
1.2
V
RS-232 Input Threshold High
1.6
2.4
V
RS-232 Input Hysteresis
0.2
0.4
1.0
V
VCC = 5 V
RS-232 Input Resistance
3
5
7
k
TA = 0
°C to 85°C
TTL/CMOS Output Voltage Low, VOL
0.05
0.4
V
IOUT = 3.2 mA
TTL/CMOS Output Voltage High, VOH
3.5
V
IOUT = –1.0 mA
TTL/CMOS Output Short-Circuit Current
–2
–85
mA
Source Current (VOUT = GND)*
TTL/CMOS Output Short-Circuit Current
10
35
mA
Sink Current (VOUT = VCC)*
TTL/CMOS Output Leakage Current
±0.05 ±10
A
SHDN = GND/EN = V
CC
0 V
≤ VOUT ≤ VCC
EN Input Threshold Low, V
INL
1.4
0.8
V
EN Input Threshold High, V
INH
2.0
1.4
V
POWER SUPPLY
Power Supply Current
4
8
mA
No Load
13
mA
3 k
Load on Both Outputs
Shutdown Power Supply Current
0.1
10
A
SHDN Input Leakage Current
±1
A
SHDN Input Threshold Low, V
INL
1.4
0.8
V
SHDN Input Threshold High, V
INH
2.0
1.4
V
AC CHARACTERISTICS
Transition Region Slew Rate
3
8
30
V/
sCL = 50 pF to 1000 pF, RL = 3 k to 7 k
Measured from +3 V to –3 V or –3 V to +3 V
Transmitter Propagation Delay TTL to RS-232
0.85
3.5
st
PHLT
1.0
3.5
stPLHT
Receiver Propagation Delay RS-232 to TTL
0.1
0.5
stPHLR
0.3
0.5
st
PLHR
Receiver Output Enable Time
125
500
ns
tER
Receiver Output Disable Time
160
500
ns
tDR
Transmitter Output Enable Time
250
s
SHDN Goes High
Transmitter Output Disable Time
3.5
s
SHDN Goes Low
Transmitter + to – Propagation Delay Difference
150
ns
Receiver + to – Propagation Delay Difference
200
ns
*Guaranteed by design, not production tested.
Specifications subject to change without notice.
B
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