參數(shù)資料
型號(hào)： ADM3251EARWZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 11/16頁(yè)
文件大?。?/td> 0K
描述： IC TXRX RS232 ISOLATED 20-SOIC
產(chǎn)品培訓(xùn)模塊： Power Line Monitoring
iCoupler Digital Isolater Technology
標(biāo)準(zhǔn)包裝： 37
類(lèi)型： 線路收發(fā)器
驅(qū)動(dòng)器/接收器數(shù)： 1/1
規(guī)程： RS232
電源電壓： 4.5 V ~ 5.5 V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 20-SOIC W
包裝： 管件
配用： EVAL-ADM3251EEB1Z-ND - BOARD EVALUATION FOR ADM3251
EVAL-ADM3251EEBZ-ND - BOARD EVALUATION ADM3251
ADM3251E
Data Sheet
All voltages are relative to their respective ground; all minimum/maximum specifications apply over the entire recommended operating
range; TA = 25°C, VCC = 3.3 V (dc-to-dc converter disabled), and the secondary side is powered externally by VISO = 3.3 V, unless
otherwise noted.
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DC CHARACTERISTICS
VCC Operating Voltage Range
3.0
3.7
V
DC-to-DC Converter Disable Threshold, VCC(DISABLE)1
3.7
V
DC-to-DC Converter Disabled
VISO2
3.0
5.5
V
Primary Side Supply Input Current, ICC(DISABLE)
2.5
mA
No load
Secondary Side Supply Input Current, IISO(DISABLE)
12
mA
VISO = 5.5 V, RL = 3 k
Secondary Side Supply Input Current, IISO(DISABLE)
6.2
mA
RL = 3 k
LOGIC
Transmitter Input, TIN
Logic Input Current, ITIN
10
+0.01
+10
μA
Logic Low Input Threshold, VTINL
0.3 VCC
V
Logic High Input Threshold, VTINH
0.7 VCC
V
Receiver Output, ROUT
Logic High Output, VROUTH
VCC 0.1
VCC
V
IROUTH = 20 μA
VCC 0.5
VCC 0.3
V
IROUTH = 4 mA
Logic Low Output, VROUTL
0.0
0.1
V
IROUTH = 20 μA
0.3
0.4
IROUTH = 4 mA
RS-232
V
Receiver, RIN
EIA-232 Input Voltage Range3
30
+30
V
EIA-232 Input Threshold Low
0.6
1.3
V
EIA-232 Input Threshold High
1.6
2.4
V
EIA-232 Input Hysteresis
0.3
V
EIA-232 Input Resistance
3
5
7
k
Transmitter, TOUT
Output Voltage Swing (RS-232)
±5
±5.7
V
RL = 3 k to GND
Transmitter Output Resistance
300
VISO = 0 V
Output Short-Circuit Current (RS-232)
±11
mA
TIMING CHARACTERISTICS
Maximum Data Rate
460
kbps
RL = 3 k to 7 k, CL = 50 pF to 1000 pF
Receiver Propagation Delay
tPHL
190
ns
tPLH
135
ns
Transmitter Propagation Delay
650
ns
RL = 3 k, CL = 1000 pF
Transmitter Skew
80
ns
Receiver Skew
55
ns
Transition Region Slew Rate3
5.5
10
30
V/μs
+3 V to 3 V or 3 V to +3 V, VCC = 3.3 V,
RL = 3 k, CL = 1000 pF, TA = 25°C
AC SPECIFICATIONS
Output Rise/Fall Time, tR/tF (10% to 90%)
2.3
ns
CL = 15 pF, CMOS signal levels
Common-Mode Transient Immunity at Logic High Output4
25
kV/μs
VCM = 1 kV, transient magnitude = 800 V
Common-Mode Transient Immunity at Logic Low Output4
25
kV/μs
VCM = 1 kV, transient magnitude = 800 V
ESD PROTECTION (RIN AND TOUT PINS)
±15
kV
Human body model air discharge
±8
kV
Human body model contact discharge
1
Enable/disable threshold is the VCC voltage at which the internal dc-to-dc converter is enabled/disabled.
2
To maintain data sheet specifications, do not draw current from VISO.
3
Guaranteed by design.
4
VCM is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential
difference between the logic and bus sides. The transient magnitude is the range over which the common mode is slewed. The common-mode voltage slew rates
apply to both rising and falling common-mode voltage edges.
Rev. G | Page 4 of 16
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