參數(shù)資料
型號(hào)： ADN2847ACP-48-RL
廠商： ANALOG DEVICES INC
元件分類： 其它接口
英文描述： 3 V Dual-Loop 50 Mbps to 3.3 Gbps Laser Diode Driver
中文描述： SPECIALTY INTERFACE CIRCUIT, QCC48
封裝： 7 X 7 MM, MO-220-VKKD-2, LFCSP-48
文件頁(yè)數(shù)： 9/12頁(yè)
文件大?。?/td> 1037K
代理商： ADN2847ACP-48-RL
REV. 0
ADN2847
–9–
Caution must be taken when choosing component values for
ac coupling to ensure that the time constants (L/R and RC, see
Figure 12) are sufficiently long for the data rate and expected
number of CIDs (consecutive identical digits). Failure to do this
could lead to pattern dependent jitter and vertical eye closure.
For designs with low series resistance, or where external components
become impractical, the ADN2847 supports direct connection
to the laser diode (see Figure 11). In this case, care must be
taken to ensure that the voltage drop across the laser diode does
not violate the minimum compliance voltage on the IMODP pin.
Optical Supervisor
The PSET and ERSET potentiometers may be replaced with a
dual-digital potentiometer, the ADN2850 (see Figure 10). The
ADN2850 provides an accurate digital control for the average
optical power and extinction ratio and ensures excellent stability
over temperature.
GND2
I
G
I
I
G
V
C
3
A
F
D
C
GND
V
CC
2
GND
IMODN
CLKN
IMODN
CLKP
GND2
GND1
IMODP
DATAP
IMODP
DATAN
GND2
GND1
GND2
V
CC
1
I
BIAS
GND
I
BIAS
PAVCAP
ERCAP
I
I
I
I
G
P
E
A
L
G
G
CCBIAS
G
G
V
C
4
ADN2847
13
24
36
25
V
CC
FAIL
DEGRADE
DATAP
DATAN
CLKN
CLKP
GND
V
CC
100nF
100nF
100nF
100nF
10 F
GND
V
s SHOULD HAVE BYPASS CAPACITORS AS
CLOSE AS POSSIBLE TO THE ACTUAL SUPPLY PINS
ON THE ADN2847 AND THE LASER DIODE USED.
CONSERVATIVE DECOUPLING WOULD INCLUDE
100pF CAPACITORS IN PARALLEL WITH 10nF
CAPACITORS.
1
12
1.5k
37
48
V
CC
V
CC
MPD
LD
V
CC
LD = LASER DIODE
MPD = MONITOR PHOTODIODE
ALS
1k
1.5k
1.5k
10nF
10nF
10nF
10nF
22nF
22nF
10 H
NOTES
*
DESIGNATES COMPONENTS THAT NEED TO BE OPTIMIZED FOR THE TYPE OF LASER USED.
**
FOR DIGITAL PROGRAMMING, THE ADN2850 OR THE ADN2860 OPTICAL SUPERVISOR CAN BE USED.
*
*
*
*
**
**
Figure 11. DC-Coupled 3.3 Gbps Test Circuit, Data Not Clocked
ADN2847
PSET
ERSET
D
D
I
DATAP
DATAN
IDTONE
IMODP
I
BIAS
V
CC
V
CC
IMPD
ADN2850
DAC1
DAC2
SDI
SDO
CLK
CS
TX
RX
CLK
CS
V
CC
Figure 10. Application Using the ADN2850 a Dual 10-Bit
Digital Potentiometer with an Extremely Low Temperature
Coefficient as an Optical Supervisor
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