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參數(shù)資料
| 型號(hào)： | ADN2849ACP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 其它接口 |
| 英文描述： | 10.7 Gbps Electro-Absorption Modulator Driver |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, PQCC24 |
| 封裝： | 4 X 4 MM, PLASTIC, MO-220VGGD-2, LFCSP-24 |
| 文件頁(yè)數(shù)： | 12/17頁(yè) |
| 文件大?。?/td> | 1425K |
| 代理商： | ADN2849ACP |
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ADN2849
Modulation voltage
The modulation voltage is established by switching the
modulation current through the parallel combination of the
modulator terminating impedance (50
) and the 50
back-
termination resistor on the ADN2849. The modulation set
voltage applied to the MOD_SET pin is converted into current
(IMOD) using a voltage-to-current converter which forces a
voltage equal to V
MOD_SET
across an internal fixed resistor. For
IMOD range of 24mA to 120mA, the MOD_SET voltage ranges
from 340mV to 1.7V. With its maximum modulation current of
120mA, the ADN2849 is capable of generating a 3V modulation
voltage across the equivalent load resistance (25
). The
equivalent circuit of the MOD_SET pin is shown in figure 26.
Rev. Pr. G | Page 12 of 17
MOD_SET
100
100
VEE
VEE
GND
Figure 26. Equivalent circuit of the MOD_SET pin
Bias offset voltage
The bias offset voltage is set by adjusting the voltage between
the BIAS_SET pin and GND. An internal operational amplifier
sets the termination voltage for the internal 50
output back-
termination resistors (VTERM) by gaining up the BIAS_SET
voltage by two. This gain of two cancels out the attenuation of
the dividing network formed by the 50
back- termination
resistor from the ADN2849 output and the 50
load
termination, providing a nominal gain of one from the
BIAS_SET input to the bias offset voltage available at the output
of the ADN2849 (MODP pin). For proper operation, an
external low ESR 100nF decoupling capacitor is required
between the VTERM pin and GND to prevent transient
disturbances on this node. The equivalent circuits of the
BIAS_SET, MODP, MODN_TERM and VTERM pins are
shown in figure27.
5K
100
10K
50
BIAS_SET
MODP
MODN_TERM
VTERM
VEE
VEE
VEE
VEE
GND
GND
Figure 27. Equivalent circuit of the BIAS_SET, MODP, MODN_TERM
and VTERM pins
During factory calibration of the optical transmitter, the user
adjusts the BIAS_SET and MOD_SET voltages to achieve the
desired bias offset and modulation voltages. This adjustment
calibrates out BIAS_SET to bias offset voltage and MOD_SET to
modulation voltage gain variations in the ADN2849 due to
resistor process variations and the offset of the internal
amplifiers. The drift in the bias offset and modulation voltages
over temperature and supply voltage variations is very low once
it has been calibrated under nominal conditions.
Headroom calculations
The ADN2849 is capable of delivering up to 2V bias offset and
up to 3V modulation voltage on a 50
single-ended load.
However, these values for the bias offset and modulation
voltages cannot be obtained at the same time due to headroom
constraints. The minimum supply voltage and the MODP
minimum output voltage specifications determine the
maximum modulation and bias offset voltages that can be
achieved concurrently. In order to guarantee proper operation
of the ADN2849, the bias offset and modulation voltages must
satisfy the following condition:
min
MODP
V
ffset
O
Bias
Modulation
V
VEE
V
≤
+
Where,
V
Modulation
= the required modulation voltage
V
Bias Offset
= the required bias offset voltage
VEE = the supply voltage
V
MODPmin
= the minimum voltage at the MODP pin (see table 1)
Preliminary Technical Data
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADN2849ACP-RL | 10.7 Gbps Electro-Absorption Modulator Driver |
| ADN2849ACP-RL7 | 10.7 Gbps Electro-Absorption Modulator Driver |
| ADN2849SURF | 10.7 Gbps Electro-Absorption Modulator Driver |
| ADN2850ACP25 | Nonvolatile Memory, Dual 1024 Position Programmable Resistors |
| ADN2850ACP25-RL7 | Nonvolatile Memory, Dual 1024 Position Programmable Resistors |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADN2849ACP-RL | 制造商:AD 制造商全稱:Analog Devices 功能描述:10.7 Gbps Electro-Absorption Modulator Driver |
| ADN2849ACP-RL7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10.7 Gbps Electro-Absorption Modulator Driver |
| ADN2849SURF | 制造商:AD 制造商全稱:Analog Devices 功能描述:10.7 Gbps Electro-Absorption Modulator Driver |
| ADN2850 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Nonvolatile Memory, Dual 1024 Position Programmable Resistors |
| ADN2850ACP25 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Nonvolatile Memory, Dual 1024 Position Programmable Resistors |
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