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參數(shù)資料
| 型號(hào)： | ADN2870ACPZ-RL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 其它接口 |
| 英文描述： | 3.3 V Dual-Loop, 50 Mbps to 3.3 Gbps Laser Diode Driver |
| 中文描述： | SPECIALTY INTERFACE CIRCUIT, QCC24 |
| 封裝： | 4 X 4 MM, LEAD FREE, MO-220VGGD-2, LFCSP-24 |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 764K |
| 代理商： | ADN2870ACPZ-RL |
ADN2870
Rev. 0 | Page 15 of 20
0
VCC
PHOTODIODE
ADN2870
PAVSET
R
μ
C ADC
INPUT
Figure 31. Single Measurement of IMPD Across a
Sense Resistor in Resistor Setpoint IMPD Monitoring
LOOP BANDWIDTH SELECTION
To ensure that the ADN2870 control loops have sufficient
bandwidth, the average power loop capacitor (PAVCAP) and
the extinction ratio loop capacitor (ERCAP) are calculated
using the lasers slope efficiency (watts/amps) and the average
power required.
For resistor point control:
)
(
6
2
=
Farad
PAV
LI
E
PAVCAP
×
)
(
2
Farad
PAVCAP
ERCAP
=
For voltage setpoint control:
)
(
6
28
.
Farad
PAV
LI
E
PAVCAP
×
=
)
(
2
Farad
PAVCAP
ERCAP
=
where
PAV
is the average power required and
LI
(mW/mA) is
the typical slope efficiency at 25°C of a batch of lasers that are
used in a design. The capacitor value equation is used to get a
centered value for the particular type of laser that is used in a
design and average power setting. The laser LI can vary by a
factor of 7 between different physical lasers of the same type
and across temperature without the need to recalculate the
PAVCAP and ERCAP values. In ac coupling configuration the
LI can be calculated as follows:
Imod
P0
P1
LI
=
(mW/mA)
where
P1
is the optical power (mW) at the one level, and
P0
is
the optical power (mW) at the zero level.
These capacitors are placed between the PAVCAP and ERCAP
pins and ground. It is important that these capacitors are low
leakage multilayer ceramics with an insulation resistance
greater than 100 G or a time constant of 1000 sec, whichever
is less. The capacitor tolerance may be ±30% from the calculated
value to the available off the shelf value including the capacitors
own tolerance.
POWER CONSUMPTION
The ADN2870 die temperature must be kept below 125°C. The
LFCSP package has an exposed paddle, which should be con-
nected such that is at the same potential as the ADN2870 ground
pins. Power consumption can be calculated as follows:
I
CC
= I
CC
min
+ 0.3
I
MOD
P = V
CC
× I
CC
+ (I
BIAS
× V
BIAS_PIN
) + I
MOD
(V
MODP_PIN
+
V
MODN_PIN
)/
2
T
DIE
= T
AMBIENT
+ θ
JA
× P
Thus, the maximum combination of
I
BIAS
+ I
MOD
must be
calculated.
where:
I
CC
min
= 30 mA, the typical value of I
CC
provided in the
Specifications with
I
BIAS
=
I
MOD
= 0.
T
DIE
is the
die temperature.
T
AMBIENT
is the ambient temperature.
V
BIAS_PIN
is the voltage at the IBIAS pin.
V
MODP_PIN
is the voltage at the IMODP pin.
V
MODN_PIN
is the voltage at the IMODN pin.
AUTOMATIC LASER SHUTDOWN (TX_DISABLE)
ALS (TX disable) is an input that is used to shut down the
transmitter optical output. The ALS pin is pulled up internally
with a 6 k resistor, and conforms to SFP MSA specification.
When ALS is logic high or when open, both the bias and
modulation currents are turned off.
BIAS AND MODULATION MONITOR CURRENTS
IBMON and IMMON are current-controlled current sources
that mirror a ratio of the bias and modulation current. The
monitor bias current, IBMON, and the monitor modulation
current, IMMON, should both be connected to ground through
a resistor to provide a voltage proportional to the bias current
and modulation current, respectively. When using a micro-
controller, the voltage developed across these resistors can be
connected to two of the ADC channels, making available a
digital representation of the bias and modulation current.
DATA INPUTS
Data inputs should be ac-coupled (10 nF capacitors are
recommended) and are terminated via a 100 internal resistor
between the DATAP and DATAN pins. A high impedance
circuit sets the common-mode voltage and is designed to allow
maximum input voltage headroom over temperature. It is
necessary to use ac coupling to eliminate the need for matching
between common-mode voltages.
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