- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10195 > ADN4696EBRZ-RL7 (Analog Devices Inc)IC TXRX LVDS 2CH 8SOIC PDF資料下載
參數(shù)資料
| 型號： | ADN4696EBRZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX LVDS 2CH 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | * |
Data Sheet
ADN4696E/ADN4697E
Rev. 0 | Page 5 of 20
TIMING SPECIFICATIONS
Table 4.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions / Comments
DRIVER
Maximum Data Rate
200
Mbps
Propagation Delay
tPLH, tPHL
1
1.5
2.4
ns
Differential Output Rise/Fall Time
tR, tF
1
1.6
ns
Pulse Skew |tPHL – tPLH|
tSK
0
100
ps
Part-to-Part Skew2
tSK(PP)
1
ns
Period Jitter, RMS (1 Standard Deviation)3
tJ(PER)
2
3
ps
100 MHz clock input4 (see Figure 26)
Peak-to-Peak Jitter3, 5
tJ(PP)
30
130
ps
Disable Time from High Level
tPHZ
7
ns
Disable Time from Low Level
tPLZ
7
ns
Enable Time to High Level
tPZH
7
ns
Enable Time to Low Level
tPZL
7
ns
RECEIVER
Propagation Delay
tRPLH, tRPHL
2
4
6
ns
Rise/Fall Time
tR, tF
1
2.3
ns
Pulse Skew |tRPHL – tRPLH|
tSK
Type 2 Receiver (ADN4696E, ADN4697E)
300
500
ps
Part-to-Part Skew2
tSK(PP)
1
ns
Period Jitter, RMS (1 Standard Deviation)3
tJ(PER)
4
7
ps
100 MHz clock input7 (see Figure 32)
Peak-to-Peak Jitter3, 5
tJ(PP)
Type 2 Receiver (ADN4696E, ADN4697E)
450
800
ps
Disable Time from High Level
tRPHZ
10
ns
Disable Time from Low Level
tRPLZ
10
ns
Enable Time to High Level
tRPZH
15
ns
Enable Time to Low Level
tRPZL
15
ns
1
All typicals are given for VCC = 3.3 V and TA = 25°C.
2
tSK(PP) is defined as the difference between the propagation delays of two devices between any specified terminals. This specification applies to devices at the same VCC
and temperature, and with identical packages and test circuits.
3
Jitter parameters are guaranteed by design and characterization. Figures do not include stimulus jitter.
4
tR = tF = 0.5 ns (10% to 90%), measured over 30k samples.
5
Peak-to-peak jitter figures include jitter due to pulse skew (tSK).
6
tR = tF = 0.5 ns (10% to 90%), measured over 100k samples.
7
|VID| = 400 mV (ADN4696, ADN4697), VIC = 1.1 V, tR = tF = 0.5 ns (10% to 90%), measured over 30k samples.
8
|VID| = 400 mV (ADN4696, ADN4697), VIC = 1.1 V, tR = tF = 0.5 ns (10% to 90%), measured over 100k samples.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADN4697EBRZ-RL7 | IC TXRX LVDS 2CH 14SOIC |
| ADM1490EBRZ-REEL7 | IC TXRX RS485 FULL DUPLEX 8SOIC |
| VE-2ND-CU-F4 | CONVERTER MOD DC/DC 85V 200W |
| VE-JWP-MX-S | CONVERTER MOD DC/DC 13.8V 75W |
| VE-23J-MX-F3 | CONVERTER MOD DC/DC 36V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADN4697E | 制造商:AD 制造商全稱:Analog Devices 功能描述:3.3 V, 100 Mbps, Half- and Full-Duplex |
| ADN4697EBRZ | 功能描述:IC RCVR LVDS 2CH 14SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:* 標(biāo)準(zhǔn)包裝:27 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):3/3 規(guī)程:RS232，RS485 電源電壓:4.75 V ~ 5.25 V 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
| ADN4697EBRZ-RL7 | 功能描述:IC TXRX LVDS 2CH 14SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:* 標(biāo)準(zhǔn)包裝:121 系列:- 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:RS422，RS485 電源電壓:3 V ~ 3.6 V 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:10-DFN（3x3） 包裝:管件 |
| ADN5-24-1PM | 制造商:Johnson Components 功能描述:AC/DC Power Supply Single-OUT 24V 5A 120W 制造商:Emerson Network Power - Embedded Power 功能描述:PSU DIN RAIL 24V 5A 制造商:EMERSON NETWORK POWER 功能描述:PSU, DIN RAIL, 24V, 5A |
| ADN5-24-1PM-C | 功能描述:DIN導(dǎo)軌式電源 120W 24V @5A 1-Phase Metal - C Series RoHS:否 制造商:Mean Well 產(chǎn)品:Linear Supplies 商用/醫(yī)用:Commercial 輸出功率額定值:960 W 輸入電壓:180 VAC to 264 VAC, 254 VDC to 370 VDC 輸出端數(shù)量:1 輸出電壓（通道 1）:48 V 輸出電流（通道 1）: 輸出電壓（通道 2）: 輸出電流（通道 2）: 輸出電壓（通道 3）: 輸出電流（通道 3）: 尺寸:150 mm L x 110 mm W |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。