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參數(shù)資料
| 型號： | ADN8810ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/16頁 |
| 文件大?。?/td> | 262K |
| 描述： | IC CURRENT SOURCE(12BIT) 24LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 功能： | 電流源（12 位） |
| 電流 - 輸出： | 300mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 帶卷 (TR) |
ADN8810
Rev. A | Page 14 of 16
5V
TO OTHER 5V
DIGITAL LOGIC
LOGIC GROUND
RETURN
3V
GND
POWER SUPPLY
ADN8810
AVDD
AVSS
LOAD
GND
IOUT
LOAD
DVDD
PVDD DVSS
DGND
Figure 23. Star Supply and Ground Technique
To improve thermal dissipation, the slug on the bottom of the
LFCSP package should be soldered to the PC board with
multiple vias into a low noise ground plane. Connecting these
vias to a copper area on the bottom side of the board will
further improve thermal dissipation.
Use identical trace lengths for the two output sense resistors.
These lengths are shown as X and Y in Figure 24. Differences in
trace lengths cause differences in parasitic series resistance.
Because the sense resistors can be as low as 1.37 ? small
parasitic differences can lower both the output current accuracy
and the output impedance. Application Note AN-619 shows a
good layout for these traces.
FB
IOUT
R
SN
R
SN
R
SN
TO LOAD
X
Y
ADN8810
SUGGESTED PAD LAYOUT FOR CP-24 PACKAGE
Figure 25 shows the dimensions for the PC board pad layout for
the ADN8810. The package is a 4 mm ?4 mm, 24-lead LFCSP.
The metallic slug underneath the package should be soldered to
a copper pad connected to AVSS, the lowest supply voltage to
the ADN8810. For single-supply applications, this is ground.
Use multiple vias to this pad to improve the thermal dissipation
of the package.
0.027
(0.69)
0.011
(0.28)
0.020
(0.50)
PACKAGE
OUTLINE
DIMENSIONS ARE SHOWN
IN INCHES AND (MM).
CONTROLLING DIMENSIONS ARE IN MILLIMETERS
0.004
(0.10)
0.827
(2.1) SQ
0.109
(2.78)
0.172
(4.36)
Figure 25. Suggested PC Board Layout for CP-24 Pad Landing
Figure 24. Use Identical Trace Lengths for Sense Resistors
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