參數(shù)資料
型號: ADP1111AN
廠商: ANALOG DEVICES INC
元件分類: 穩(wěn)壓器
英文描述: Micropower, Step-Up/Step-Down SW Regulator; Adjustable and Fixed 3.3 V, 5 V, 12 V
中文描述: 1.5 A SWITCHING REGULATOR, 88 kHz SWITCHING FREQ-MAX, PDIP8
封裝: PLASTIC, DIP-8
文件頁數(shù): 4/16頁
文件大?。?/td> 408K
代理商: ADP1111AN
ADP1111
–12–
REV. 0
This occurs in the step-up mode when the following condition is
met:
VOUT + VDIODE
VIN VSW
<
1
DC
where DC is the ADP1111’s duty cycle. When this relationship
exists, the inductor current does not go all the way to zero
during the time that the switch is OFF. When the switch turns
on for the next cycle, the inductor current begins to ramp up
from the residual level. If the switch ON time remains constant,
the inductor current will increase to a high level (see Figure 24).
This increases output ripple and can require a larger inductor
and capacitor. By controlling switch current with the ILIM
resistor, output ripple current can be maintained at the design
values. Figure 25 illustrates the action of the ILIM circuit.
Figure 24.
Figure 25.
The internal structure of the ILIM circuit is shown in Figure 26.
Q1 is the ADP1111’s internal power switch that is paralleled by
sense transistor Q2. The relative sizes of Q1 and Q2 are scaled
so that IQ2 is 0.5% of IQ1. Current flows to Q2 through an
internal 80
resistor and through the R
LIM resistor. These two
resistors parallel the base-emitter junction of the oscillator-
disable transistor, Q3. When the voltage across R1 and RLIM
exceeds 0.6 V, Q3 turns on and terminates the output pulse. If
only the 80
internal resistor is used (i.e. the I
LIM pin is
connected directly to VIN), the maximum switch current will be
1.5 A. Figure 6 gives RLIM values for lower current-limit values.
72kHz
OSC
VIN
POWER
SWITCH
SW2
SW1
RLIM
DRIVER
80
(INTERNAL)
ILIM
IQ1
200
VIN
(EXTERNAL)
Q2
ADP1111
Q1
Q3
R1
Figure 26. ADP1111 Current Limit Operation
The delay through the current limiting circuit is approximately
1
s. If the switch ON time is reduced to less than 3 s, accuracy
of the current trip-point is reduced. Attempting to program a
switch ON time of 1
s or less will produce spurious responses
in the switch ON time; however, the ADP1111 will still provide
a properly regulated output voltage.
PROGRAMMING THE GAIN BLOCK
The gain block of the ADP1111 can be used as a low-battery
detector, error amplifier or linear post regulator. The gain block
consists of an op amp with PNP inputs and an open-collector
NPN output. The inverting input is internally connected to the
ADP1111’s 1.25 V reference, while the noninverting input is
available at the SET pin. The NPN output transistor will sink
about 300
A.
Figure 27a shows the gain block configured as a low-battery
monitor. Resistors R1 and R2 should be set to high values to
reduce quiescent current, but not so high that bias current in
the SET input causes large errors. A value of 33 k
for R2 is a
good compromise. The value for R1 is then calculated from the
formula:
R1
=
V LOBATT 1.25 V
1.25 V
R2
where VLOBATT is the desired low battery trip point. Since the
gain block output is an open-collector NPN, a pull-up resistor
should be connected to the positive logic power supply.
ADP1111
1.25V
REF
GND
AO
5V
RL
47k
TO
PROCESSOR
R1
R2
VBAT
VIN
SET
33k
R1= –––––––––
VLB–1.25V
35.1A
VLB = BATTERY TRIP POINT
Figure 27a. Setting the Low Battery Detector Trip Point
200mA/div
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