- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374022 > ADP3502ASU (ANALOG DEVICES INC) CDMA Power Management System PDF資料下載
參數(shù)資料
| 型號： | ADP3502ASU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | CDMA Power Management System |
| 中文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP64 |
| 封裝： | 7 X 7 MM, 1 MM HEIGHT, PLASTIC, MS-026ABD, TQFP-64 |
| 文件頁數(shù)： | 6/36頁 |
| 文件大小： | 714K |
| 代理商： | ADP3502ASU |
第1頁第2頁第3頁第4頁第5頁當(dāng)前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
REV. 0
–6–
ADP3502
BATTERY CHARGER
(continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
CS, CLKIN, RESETIN–,
TCXOON, SLEEP–
Input Current H/L
Input High Voltage
Input Low Voltage
Hysteresis
I
IL
/I
IH
V
IH
V
IL
V
IN
= V
LDO1
or 0 V
–1
2.25
+1
μ
A
V
V
mV
0.5
520
KEYPADROW
(Internal 20 k
Pull-Up)
Input High Voltage
Input Low Voltage
Hysteresis
V
IH
V
IL
2.25
V
V
mV
0.5
470
GPIO, DATA
Input Current H/L
Input High Voltage
Input Low Voltage
Hysteresis
Output High Voltage
Output Low Voltage
I
IL
/I
IH
V
IH
V
IL
V
IN
= V
LDO1
or 0 V
–1
2.25
+1
μ
A
V
V
mV
V
V
0.5
260
V
OH
V
OL
I
OH
= 400
μ
A
I
OL
= –1.8 mA
2.69
0.28
INT–
Output High Voltage
Output Low Voltage
V
OH
V
OL
I
OH
= 400
μ
A
I
OL
= –1.8 mA
2.69
V
V
0.28
BLIGHT (Open-Drain Output)
Output Low Voltage
V
OL
I
OL
= –100 mA
0.4
V
KEYPADCOL
(Open-Drain Output)
Output Low Voltage
V
OL
I
OL
= –1.8 mA
0.15
V
PWRONKEY–, OPT1
(Internal 140 k
Pull-Up)
Input High Voltage
Input Low Voltage
Hysteresis
OPT2– (Input/Open-Drain Output)
Input Current H
Input High Voltage
Input Low Voltage
Hysteresis
Output Low Voltage
V
IH
V
IL
V
HYS
0.8 VBAT
V
V
mV
0.2 VBAT
950
I
IH
V
IH
V
IL
V
HYS
V
OL
V
IN
= VBAT
1
μ
A
V
V
mV
V
0.8 VBAT
0.2 VBAT
I
OL
= –1.8 mA
950
0.1
VBAT
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
CHARGE TRANSISTOR REVERSE
LEAKAGE CURRENT
3
MINIMUM LOAD FOR STABILITY
1
I
CHG
– I
LKG
No Adapter Present
1
μ
A
I
L
CBAT = 10
μ
F MLCC, No Battery
10
mA
NOTES
1
Guaranteed but not tested.
2
DDLO hysteresis is dependent on DDLO threshold value. If DDLO threshold is at maximum, DDLO hysteresis is at maximum at the same time.
3
This includes the total reverse current from battery to BVS, BASE, ISENSE, and ADAPTER pins with no adapter present. No signal path between ADAPTER pin
and ADPSUPPLY pin.
Specifications subject to change without notice.
LOGIC
DC SPECIFICATIONS
(T
A
= 25 C, C
VBAT
= 1 F MLCC, VBAT = 3.6 V, unless otherwise noted.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADP3510 | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| ADP3510ARU | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| ADP3522 | GSM Power Management System |
| ADP3522ACP-1.8 | GSM Power Management System |
| ADP3522ACP-3 | GSM Power Management System |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADP3502ASU-REEL | 制造商:Analog Devices 功能描述:CDMA Power Management System 64-Pin TQFP T/R |
| ADP3510 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA Power Management System |
| ADP3510ARU | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA Power Management System |
| ADP3510ARU-REEL7 | 制造商:Analog Devices 功能描述: |
| ADP3522 | 制造商:AD 制造商全稱:Analog Devices 功能描述:GSM Power Management System |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。