參數資料
型號: ADP5585CP-EVALZ
廠商: Analog Devices Inc
文件頁數: 39/40頁
文件大小: 0K
描述: BOARD EVAL FOR ADP5585CP
標準包裝: 1
主要目的: 接口,GPIO 擴展器
已用 IC / 零件: ADP5585
主要屬性: 10 個可配置的 I/O
次要屬性: I²C 接口
已供物品:
ADP5585
Data Sheet
Rev. C | Page 8 of 40
DEVICE ENABLE
When sufficient voltage is applied to VDD and the RST pin is
driven with a logic high level, the ADP5585 starts up in standby
mode with all settings at default. The user can configure the
device via the I2C interface. When the RST pin is low, the
ADP5585 enters a reset state and all settings return to default.
The RST pin features a debounce filter.
If using the ADP5585ACBZ-01-R7 or ADP5585ACPZ-01-R7
device model, the RST pin acts as an extra row pin. Without a
reset pin, the only method to reset the device is by bringing
VDD below the UVLO threshold.
DEVICE OVERVIEW
The ADP5585 contains 10 multiconfigurable input/output pins.
Each pin can be programmed to enable the device to carry out
its various functions, as follows:
Keypad matrix decoding (five-column by five-row matrix
maximum).
General-purpose I/O expansion (up to 10 inputs/outputs).
PWM generation.
Logic function building blocks (up to three inputs and one
output).
Two reset generators.
All 10 input/output pins have an I/O structure as shown in
I/O
VDD
100k
DEBOUNCE
300k
09841-
005
I/O
DRIVE
Figure 6. I/O Structure
Each I/O can be pulled up with a 100 kΩ or 300 kΩ resistor or
pulled down with a 300 kΩ resistor. For logic output drive, each
I/O has a 5 mA PMOS source and a 10 mA NMOS sink for a push-
pull type output. For open-drain output situations, the 5 mA
PMOS source is not enabled. For logic input applications, each
I/O can be sampled directly or, alternatively, sampled through a
debounce filter.
The I/O structure shown in Figure 6 allows for all GPI and GPO
functions, as well as PWM and clock divide functions. For key
matrix scan and decode, the scanning circuit uses the 100 kΩ or
300 kΩ resistor for pulling up keypad row pins and the 10 mA
NMOS sinks for grounding keypad column pins (see the Key
Scan Control section for details about key decoding).
Configuration of the device is carried out by programming an
array of internal registers via the I2C interface. Feedback of
device status and pending interrupts can be flagged to an
external processor by using the INT pin.
The ADP5585 is offered with three feature sets. Table 5 lists the
options that are available for each model of the ADP5585.
Table 5. Matrix Options by Device Model
Model
Description
ADP5585ACBZ-00-R7
GPIO pull up (default option)
5-row × 5-column matrix
ADP5585ACBZ-01-R7
Row 5 added to GPIOs
6-row × 5-column matrix
ADP5585ACBZ-02-R7
No pull-up resistors to special function
pins1
5-row × 5-column matrix
ADP5585ACBZ-04-R7
Pull-down resistors to all GPIO pins on
start-up
5-row × 5-column matrix
ADP5585ACPZ-00-R7
GPIO pull up (default option)
5-row × 5-column matrix
ADP5585ACPZ-01-R7
Row 5 added to GPIOs
6-row × 5-column matrix
ADP5585ACPZ-03-R7
Alternate I2C address (0x30)
5-row × 5-column matrix
1
Special function pins are defined as R0, R3, R4, and C4. See Table 4 for
details.
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參數描述
ADP5586 制造商:AD 制造商全稱:Analog Devices 功能描述:Keypad Decoder and I/O Port Expander
ADP5586ACBZ-00-R7 功能描述:接口-I/O擴展器 RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
ADP5586ACBZ-01-R7 功能描述:接口-I/O擴展器 RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
ADP5586ACBZ-03-R7 功能描述:接口-I/O擴展器 RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
ADP5586CB-EVALZ 功能描述:界面開發(fā)工具 RoHS:否 制造商:Bourns 產品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V