參數(shù)資料
型號: ADS4616A4A-7
廠商: ADATA Technology Co., Ltd.
英文描述: Synchronous DRAM(512K X 16 Bit X 2 Banks)
中文描述: 同步DRAM(為512k × 16位× 2組)
文件頁數(shù): 1/8頁
文件大小: 530K
代理商: ADS4616A4A-7
A-Data
ADS4616A4A
Synchronous DRAM
512K x 16 Bit x 2 Banks
General Description
The ADS4616A4A are two-bank Synchronous
DRAMs organized as 524,288 words x 16 bits x 2
banks,
Synchronous design allows precise cycle control
with the use of system clock I/O transactions are
possible on every clock cycle.
Range of operating frequencies, programmable
burst length and programmable latencies allow the
same device to be useful for a variety of high
bandwidth high performance memory system
applications
Features
Single 3.3V +/- 0.3V power supply
MRS Cycle with address key programs
-CAS Latency (2 & 3)
-Burst Length (1,2,4,8, & full page)
-Burst Type (sequential & Interleave)
2 banks operation
All inputs are sampled at the positive edge of
the system clock
Burst Read single write operation
Auto & Self refresh
4096 refresh cycle
DQM for masking
Package:50-pins 400 mil TSOP-Type II
Ordering Information.
Part No.
ADS4616A4A-5
ADS4616A4A -6
ADS4616A4A -7
Pin Assignment
Frequency
200Mhz
166Mhz
143Mhz
Interface
LVTTL
LVTTL
LVTTL
Package
400mil 50pin TSOPII
400mil 50pin TSOPII
400mil 50pin TSOPII
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
50
49
48
47
46
45
44
43
36
37
35
34
33
32
41
40
42
39
38
31
30
29
Vss
DQ15
Vss
Q
DQ14
DQ13
V
DDQ
DQ12
DQ11
V
SSQ
DQ10
DQ9
V
DDQ
DQ8
NC
UDQM
CLK
CKE
NC
A9
A8
A7
A6
A5
A4
V
SS
V
DD
DQ0
V
DDQ
DQ1
V
SSQ
DQ2
DQ3
DQ4
V
DDQ
DQ5
DQ6
V
SSQ
DQ7
LDQM
/WE
/CAS
/RAS
/CS
(BS)A11
A10
A0
A1
A2
A3
DD
V
50-pin plastic TSOP II 400 mil
Rev 1 December, 2001
1
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