參數(shù)資料
型號(hào)： ADS62P42IRGCRG4
廠商： Texas Instruments
文件頁數(shù)： 42/78頁
文件大?。?/td> 0K
描述： IC ADC 14BIT SER/PAR 65M 64VQFN
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 14
采樣率（每秒）： 65M
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 64-VQFN 裸露焊盤（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 2 個(gè)差分，單極
Resr
100 W
Lpkg
2nH
25 W
Sampling
Capacitor
Csamp
4pF
INP
INM
Cbond
1pF
50 W
Cpar1
0.8pF
Ron
10 W
Cpar2
1pF
Ron
15 W
Ron
15 W
Cpar2
1pF
50 W
3.2pF
Lpkg
2nH
25 W
Cbond
1pF
Resr
100 W
Csamp
4pF
Sampling
Capacitor
Sampling
Switch
Sampling
Switch
RCRFilter
S0322-01
SLAS561C
– JULY 2007 – REVISED FEBRUARY 2012
APPLICATION INFORMATION
THEORY OF OPERATION
ADS62P4X is a low power 14-bit dual channel pipeline ADC family fabricated in a CMOS process using switched
capacitor techniques.
The conversion process is initiated by a rising edge of the external input clock. Once the signal is captured by
the input sample and hold, the input sample is sequentially converted by a series of small resolution stages, with
the outputs combined in a digital correction logic block. At every clock edge the sample propagates through the
pipeline resulting in a data latency of 14 clock cycles. The output is available as 14-bit data, in DDR LVDS or
CMOS and coded in either straight offset binary or binary 2s complement format.
ANALOG INPUT
The analog input consists of a switched-capacitor based differential sample and hold architecture.
This differential topology results in very good AC performance even for high input frequencies at high sampling
rates. The INP and INM pins have to be externally biased around a common-mode voltage of 1.5 V, available on
VCM pin. For a full-scale differential input, each input pin INP, INM has to swing symmetrically between VCM +
0.5 V and VCM
– 0.5 V, resulting in a 2 VPP differential input swing. The maximum swing is determined by the
internal reference voltages REFP (2.5 V nominal) and REFM (0.5 V, nominal).
Figure 82. Analog Input Equivalent Circuit
The input sampling circuit has a high 3-dB bandwidth that extends up to 450 MHz (measured from the input pins
to the sampled voltage).
Copyright
2007–2012, Texas Instruments Incorporated
47
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ADS62P42IRGCT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 14B 65MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS62P42IRGCTG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC DUAL 14B 65MSPS Para ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS62P42RGC 制造商:TI 制造商全稱:Texas Instruments 功能描述:Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs
ADS62P43 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
ADS62P43EVM 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 ADS62P43 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
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