參數(shù)資料
型號(hào): ADS62P42IRGCTG4
廠商: Texas Instruments
文件頁數(shù): 9/78頁
文件大小: 0K
描述: IC ADC 14BIT SER/PAR 65M 64VQFN
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 250
位數(shù): 14
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 64-VQFN 裸露焊盤(9x9)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個(gè)差分,單極
T0109-01
Register Address
RegisterData
t
(SCLK)
t
(DSU)
t
(DH)
t
(SLOADS)
D7
A7
D3
A3
D5
A5
D1
A1
D6
A6
D2
A2
D4
A4
D0
A0
SDATA
SCLK
SEN
RESET
t
(SLOADH)
SLAS561C
– JULY 2007 – REVISED FEBRUARY 2012
Figure 6. Serial Interface Timing
Serial Register Readout (only when CMOS interface is used)
The device includes an option where the contents of the internal registers can be read back. This may be useful
as a diagnostic check to verify the serial interface communication between the external controller and the ADC.
1.
First, set register bit
<SERIAL READOUT> = 1. This also disables any further writes into the registers.
2.
Initiate a serial interface cycle specifying the address of the register (A7-A0) whose content has to be read.
3.
The device outputs the contents (D7-D0) of the selected register on the SDOUT pin.
4.
The external controller can latch the contents at the falling edge of SCLK.
5.
To enable register writes, reset register bit
<SERIAL READOUT> = 0.
The serial register readout works only with CMOS interface; with LVDS interface, pin 56 functions as CLKOUTM.
When
<SERIAL READOUT> is disabled, SDOUT pin is forced low or high by the device (and not put in
high-impedance). If serial readout is not used, SDOUT pin must be floated.
Copyright
2007–2012, Texas Instruments Incorporated
17
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