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參數(shù)資料
| 型號(hào)： | ADS7616A4A-55 |
| 廠商： | ADATA Technology Co., Ltd. |
| 英文描述： | Synchronous DRAM(2M X 16 Bit X 4 Banks) |
| 中文描述： | 同步DRAM（2米× 16位× 4個(gè)銀行） |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 565K |
| 代理商： | ADS7616A4A-55 |
A-Data
ADS7616A4A
DC Characteristics II
Speed
Parameter
Symbol
Test condition
-5.5
-6
-7
Unit
Note
Operating Current
IDD1
Burst length=1, One bank active
tRC
≧
tRC(min),I
OL
=0mA
90
85
70
mA
1
IDD2P
CKE
≦
V
IL
(max), tCK=min
1
Precharge standby
current in power down
mode
IDD2PS
CKE
≦
V
IL
(max), tCK=
∞
1
mA
IDD2N
CKE
≧
V
IH
(min), /CS
≧
V
IH
(min),
tCK=min input signals are
changed one time during 2clks. All
other pins
≧
VDD-0.2V or
≦
0.2V
40
Precharge standby
current in Non power
down mode
IDD2NS
CKE
≧
V
IH
(min), tCK=
∞
Input signals are stable.
10
mA
IDD3
CKE
≧
V
IH
(min), /CS
≧
V
IH
(min),
tCK=min input signals are
changed one time during 2clks. All
other pins
≧
VDD-0.2V or
≦
0.2V
60
Active standby current
in Non power down
mode
IDD3P
CKE
≧
V
IL
(min), tCK=min
Input signals are stable.
10
mA
Burst mode operating
current
IDD4
t
CK
≧
t
CK
(min),I
OL
=0 mA
All banks active
110
105
100
mA
1
Auto refresh current
IDD5
tRRC
≧
tRRC(min), All banks
active
190
180
170
mA
2
Self refresh current
IDD6
CKE
≦
0.2V
2
mA
Note:
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output
open.
2. Min. of tRRC is shown at AC characteristics.
Rev 1.0 April, 2001
5
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