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參數資料
| 型號： | ADS7800JP |
| 英文描述： | 12-Bit 3ms Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 12位為3ms采樣模擬到數字轉換器 |
| 文件頁數： | 11/12頁 |
| 文件大?。?/td> | 122K |
| 代理商： | ADS7800JP |
11
ADS7800
FIGURE 10.
±
10V Range With External Trims.
converter if at all possible. A ground plane is usually the best
solution for preserving dynamic performance and reducing
noise coupling into sensitive converter circuits. Where any
compromises must be made, the common return of the
analog input signal should be referenced to pin 4, AGND,
on the ADS7800, which prevents any voltage drops that
might occur in the power supply common returns from
appearing in series with the input signal.
Coupling between analog input and digital lines should be
minimized by careful layout. For instance, if the lines must
cross, they should do so at right angles. Parallel analog and
digital lines should be separated from each other by a pattern
connected to common.
If external full scale and offset potentiometers are used, the
potentiometers and related resistors should be located as
close to the ADS7800 as possible.
REFERENCE BYPASS
Pin 3 (REF) should be bypassed with a 22
μ
F to 47
μ
F
tantalum capacitor. A rated working voltage of 2V or more
is acceptable here. This pin is used to enhance the system
accuracy of the internal reference circuit, and is not
recommended for driving external signals. If there are
important system reasons for using the ADS7800 reference
externally, the output of pin 3 must be appropriately
buffered.
“HOT SOCKET” PRECAUTION
Two separate +5V V
S
pins, 23 and 24, are used to minimize
noise caused by digital transients. If one pin is powered and
the other is not, the ADS7800 may “Latch Up” and draw
excessive current. In normal operation, this is not a problem
because both pins will be soldered together. However,
during evaluation, incoming inspection, repair, etc., where
the potential of a “Hot Socket” exists, care should be taken
to power the ADS7800 only after it has been socketed.
FIGURE 9. Read Cycle Timing.
MINIMIZING “GLITCHES”
Coupling of external transients into an A/D converter can
cause errors which are difficult to debug. In addition to the
discussions earlier on layout considerations for supplies,
bypassing and grounding, there are several other useful
steps that can be taken to get the best analog performance
out of a system using the ADS7800. These potential system
problem sources are particularly important to consider when
developing a new system, and looking for the causes of
errors in breadboards.
First, care should be taken to avoid glitches during critical
times in the sampling and conversion process. Since the
ADS7800 has an internal sample/hold function, the signal
that puts it into the hold state (R/C going LOW) is critical, as
it would be on any sample/hold amplifier. The R/C falling
edge should be sharp and have minimal ringing, especially
during the 20ns after it falls.
Although not normally required, it is also good practice to
avoid glitching the ADS7800 while bit decisions are being
made. Since the above discussion calls for a fast, clean rise
and fall on R/C, it makes sense to keep the rising edge of the
convert pulse outside the time when bit decisions are being
made. In other words, the convert pulse should either be
short (under 100ns so that it transitions before the MSB
decision), or relatively long (over 2.75
μ
s to transition after
the LSB decision).
FIGURE 11.
±
5V Range With External Trims.
Data Valid
t
DB
t
HL
t
HDR
&
t
DD
CS
R/C
HBE
BUSY
DB11-DB0
1
2
3
4
5
6
7
ADS7800
+5V
R
1
100
External
Gain Adjust
±10V
Input
10k
–15V
10k
6.65k
49.9
R
2
Bipolar
Zero
Adjust
1
2
3
4
5
6
7
ADS7800
+5V
100
±5V
Input
–15V
10k
10k
301
30.1k
External
Gain Adjust
R
2
R
1
Bipolar
Zero
Adjust
相關PDF資料 |
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| ADS7800JU | 12-Bit 3ms Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7800KU | 12-Bit 3ms Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7803 | ECONOLINE: REC3-S_DRW(Z)/H4,H6 - Safety standards and approval: EN 60950 certified, rated for 250VAV (LVD test report)- Applied for Ul 1950 Component Recognised Certification- 3W DIP Package- 4kVDC & 6kVDC Isolation- Regulated Output- Continuous Short Circiut Protection Auto-Restarting |
| ADS7803BN | Autocalibrating, 4-Channel, 12-Bit ANALOG-TO-DIGITAL CONVERTER |
| ADS7803BP | Autocalibrating, 4-Channel, 12-Bit ANALOG-TO-DIGITAL CONVERTER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ADS7800JP | 制造商:BURR-BROWN 功能描述:12BIT ADC SAMPLING 7800 DIP24 |
| ADS7800JPG4 | 功能描述:模數轉換器 - ADC 12-Bit 3us Sampling RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7800JU | 功能描述:模數轉換器 - ADC 12-Bit 3us Sampling RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7800JU/1K | 功能描述:模數轉換器 - ADC 12-Bit 3us Sampling RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7800JU/1KE4 | 功能描述:模數轉換器 - ADC 12-Bit 3us Sampling RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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