參數(shù)資料
型號(hào): ADSP-21060KBZ-160
廠商: Analog Devices Inc
文件頁數(shù): 14/64頁
文件大?。?/td> 0K
描述: IC DSP CONTROLLER 32BIT 225-BGA
產(chǎn)品培訓(xùn)模塊: SHARC Processor Overview
標(biāo)準(zhǔn)包裝: 1
系列: SHARC®
類型: 浮點(diǎn)
接口: 主機(jī)接口,連接端口,串行端口
時(shí)鐘速率: 40MHz
非易失內(nèi)存: 外部
芯片上RAM: 512kB
電壓 - 輸入/輸出: 5.00V
電壓 - 核心: 5.00V
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 225-BBGA
供應(yīng)商設(shè)備封裝: 225-PBGA
包裝: 托盤
ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC
Rev. F
|
Page 21 of 64
|
March 2008
ESD CAUTION
PACKAGE MARKING INFORMATION
Figure 8 and Table 8 provide information on detail contained
within the package marking for the ADSP-2106x processors
(actual marking format may vary). For a complete listing of
product availability, see Ordering Guide on Page 61.
TIMING SPECIFICATIONS
The ADSP-2106x processors are available at maximum proces-
sor speeds of 33 MHz (–133), and 40 MHz (–160). The timing
specifications are based on a CLKIN frequency of 40 MHz
tCK = 25 ns). The DT derating factor enables the calculation for
timing specifications within the min to max range of the tCK
specification (see Table 9). DT is the difference between the der-
ated CLKIN period and a CLKIN period of 25 ns:
DT = tCK – 25 ns
Use the exact timing information given. Do not attempt to
derive parameters from the addition or subtraction of others.
While addition or subtraction would yield meaningful results
for an individual device, the values given in this data sheet
reflect statistical variations and worst cases. Consequently, you
cannot meaningfully add parameters to derive longer times.
For voltage reference levels, see Figure 28 on Page 47 under Test
Conditions.
Timing Requirements apply to signals that are controlled by cir-
cuitry external to the processor, such as the data input for a read
operation. Timing requirements guarantee that the processor
operates correctly with other devices. (O/D) = Open Drain,
(A/D) = Active Drive.
Switching Characteristics specify how the processor changes its
signals. You have no control over this timing—circuitry external
to the processor must be designed for compatibility with these
signal characteristics. Switching characteristics tell you what the
processor will do in a given circumstance. You can also use
switching characteristics to ensure that any timing requirement
of a device connected to the processor (such as memory) is
satisfied.
Figure 8. Typical Package Brand
Table 8. Package Brand Information
Brand Key
Field Description
t
Temperature Range
pp
Package Type
Z
Lead (Pb) Free Option
ccc
See Ordering Guide
vvvvvv.x
Assembly Lot Code
n.n
Silicon Revision
yyww
Date Code
ESD (electrostatic discharge) sensitive device.
Charged devices and circuit boards can discharge
without detection. Although this product features
patented or proprietary protection circuitry, damage
may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to
avoid performance degradation or loss of functionality.
vvvvvv.x n.n
tppZccc
S
ADSP-2106x
a
yyww country_of_origin
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