參數(shù)資料
型號(hào): ADSP-21365SCSQZENG
廠商: ANALOG DEVICES INC
元件分類(lèi): 數(shù)字信號(hào)處理
英文描述: SHARC Processor
中文描述: 16-BIT, 55.55 MHz, OTHER DSP, PQFP144
封裝: LEAD FREE, MS-026BFB-HD, HSLQFP-144
文件頁(yè)數(shù): 20/54頁(yè)
文件大?。?/td> 559K
代理商: ADSP-21365SCSQZENG
Rev. PrA
|
Page 20 of 54
|
September 2004
ADSP-21365/6
Preliminary Technical Data
Reset
Interrupts
The following timing specification applies to the FLAG0,
FLAG1, and FLAG2 pins when they are configured as IRQ0,
IRQ1, and IRQ2 interrupts.
Table 12. Reset
Parameter
Timing Requirements
t
WRST
1
t
SRST
1
Applies after the power-up sequence is complete. At power-up, the processor's internal phase-locked loop requires no more than 100
μ
s while RESET is low, assuming
stable VDD and CLKIN (not including start-up time of external clock oscillator).
Min
Max
Unit
RESET Pulse Width Low
RESET Setup Before CLKIN Low
4t
CK
8
ns
ns
Figure 9. Reset
CLKIN
RESET
t
WRST
t
SRST
Table 13. Interrupts
Parameter
Timing Requirement
t
IPW
Min
Max
Unit
IRQx Pulse Width
2 × t
PCLK
+2
ns
Figure 10. Interrupts
DAI_P20-1
FLAG2-0
(IRQ2-0)
t
IPW
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ADSP-21365YSWZ-2AA 功能描述:IC DSP 32BIT 200MHZ EPAD 144LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號(hào)處理器) 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI,以太網(wǎng),RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA(20x20) 包裝:托盤(pán)