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參數(shù)資料
| 型號： | ADSP-BF538BBCZ-5F8 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CTLR 16BIT 316CSPBGA |
| 產(chǎn)品培訓(xùn)模塊： | Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Blackfin® |
| 類型： | 定點 |
| 接口： | CAN，SPI，SSP，TWI，UART |
| 時鐘速率： | 533MHz |
| 非易失內(nèi)存： | 閃存（1 MB） |
| 芯片上RAM： | 148kB |
| 電壓 - 輸入/輸出： | 3.00V，3.30V |
| 電壓 - 核心： | 1.25V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 316-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 316-CSPBGA（17x17） |
| 包裝： | 托盤 |
| 配用： | ADZS-BFAUDIO-EZEXT-ND - BOARD EVAL AUDIO BLACKFIN |
Companion Power Selection Guide for the Blackfin Processor
ADIpowermanagementproductsprovideoptimizedpowerforBlackfinproducts—whether
it’sasingleprocessorormultipleprocessors,inhandheldorhighpowerapplications,ADI
hasasolutiontomeetyourneeds.
How to Use This Guide
Determinethepeakcurrentrequirementforeachrailofyourprocessorbyreferringtothe
relevantdatasheetsandengineer-to-engineernotes.Then,usethiscompanionguideto
selectapowersolutionthatofferstherequiredV
OUTforthatrail.
TheADIsimPowerdesigntooloffersacompletesetoffeaturestocreateacomplete
BOMforallofthesesolutions.Visitwww.analog.com/ADIsimPower.
LDO Regulators
Switching Regulators and Controllers
Part
Number
AD
P1
72
0
AD
P2
20
AD
P1
70
AD
P1
23
AD
P1
25
AD
P1
75
2
AD
P1
75
3
AD
P1
70
8
AD
P1
75
4
AD
P1
75
5
AD
P1
74
0
AD
P1
1
AD
P2
10
2
AD
P2
14
0
AD
P2
10
8
AD
P5
02
0
AD
P5
02
2
AD
P2
12
0
AD
P2
30
0
AD
P2
30
1
AD
P2
10
6
AD
P2
11
9
AD
P2
30
2
AD
P2
30
3
AD
P2
11
8
AD
P2
11
4
AD
P2
11
6
AD
P1
87
1
AD
P1
87
7
Input
V
oltage
Range
(V
)
4.0
to
28
2.5
to
5.5
1.6
to
3.6
2.3
to
5.5
2.3
to
5.5
1.6
to
3.6
2.5
to
5.5
1.6
to
3.6
1.6
to
3.6
2.7
to
5.5
2.3
to
5.5
2.3
to
5.5
2.4
to
5.5
2.4
to
5.5
2.3
to
5.5
3.0
to
20
2.7
to
5.5
2.3
to
5.5
3.0
to
20
2.3
to
5.5
2.7
to
5.5
2.75
to
5.5
2.95
to
20
2.75
to
14.5
Output
V
oltage
Range
(V
)
1.23
to
5.0
0.8
to
2.8
0.8
to
3.0
0.8
to
5.0
0.8
to
5.0
0.75
to
3.0
0.8
to
5.0
0.75
to
3.0
0.75
to
3.0
0.8
to
1.87
0.8
to
3.3
1.0
to
3.3
1.1
to
3.3
See
da
ta
sheet
1.2
to
3.3
See
da
ta
sheet
0.6
to
5.0
0.8
to
12
0.8
to
5.0
0.6
to
5.0
0.8
to
12
0.6
to
5.0
0.8
to
3.3
0.8
to
5.0
0.6
to
12
0.6
to
5.0
Maximum
Output
Current
(A
)
50
mA
Dual
200
mA
300
mA
300
mA
500
mA
800
mA
1.0
1.2
2.0
600
mA
Buck
and
LDO
600
mA,
300
mA
600
mA
Dual
buck
and
LDO
0.6
+
0.25,
0.15
Dual
buck
and
LDO
0.6
+
0.6,
0.15
1.2
1.5
2.0
2.0,
3.0
Dual
buck
4.0
or
2.0
+
2.0
Dual
buck
6.0
or
3.0
+
3.0
Controller
25
Dual
controller
25
+
25
Blackfin Processors
Speed (MHz)
Min Voltage (V)
Max Voltage (V)
Max IDD
INT (mA)
VDD
INT
Domain
ADSP-BF50x
All
1.1
1.47
300
ADSP-BF51x
All
1.1
1.47
250
ADSP-BF522/ADSP-BF524/ADSP-BF526
All
1.235
1.47
250
ADSP-BF523/ADSP-BF525/ADSP-BF527
All
0.95
1.26
500
ADSP-BF531/ADSP-BF532/ADSP-BF533
400
0.8
1.32
350
ADSP-BF533
500,533,600
0.8
1.45
900
ADSP-BF534/ADSP-BF536
300,400
0.8
1.32
400
ADSP-BF534/ADSP-BF536/ADSP-BF537
500,533,600
0.8
1.43
900
ADSP-BF538/ADSP-BF539
400,533
0.8
1.375
850
ADSP-BF54x
400
0.9
1.43
750
ADSP-BF54x
533,600
0.9
1.43
1350
ADSP-BF561
All
0.8
1.42
1600
Other
Domains
*
Min Voltage (V) Nominal Voltages (V) Max Voltage (V)
Max Current (mA)
VDD
EXT
1.7
1.8,2.5,3.3
3.6
N/A
VDD
MEM
1.7
1.8,2.5,3.3
3.6
N/A
VDD
DDR
2.5
2.6
2.7
N/A
VDD
USB
3
3.3
3.6
30
VDD
OTP
2.25
2.5
2.75
25
Indicates that the regulator will support the current draw at the maximum specified frequency, voltage, and industrial temperature.
Indicates that the regulator will support the current draw in some applications, but the maximum IDD
INT must be calculated using the appropriate Blackfin data sheet to ensure compatibility.
*Refer to the relevant data sheet and engineer-to-engineer note to determine the exact “other domain” requirements of each individual processor.
Many applications power more than one device or domain using a single regulator. Compute and add the maximum current draw for each device and domain in a particular application before choosing a regulator.
w
.a
na
lo
g.c
om
/b
la
ck
fin
|
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