參數(shù)資料
型號： ADSP21CSP01BS200
元件分類： 數(shù)字信號處理
英文描述： 16-Bit Digital Signal Processor
中文描述： 16位數(shù)字信號處理器
文件頁數(shù)： 31/64頁
文件大?。?/td> 666K
代理商： ADSP21CSP01BS200
ADSP-21xx
REV. B
–31–
TIMNGPARAMETERS (ADSP-2101/2105/2111/2115/2161/2163)
INT E RRUPT S & FLAGS
Frequency
Dependency
Min
13 MHz
Min
13.824 MHz
Min
16.67 MHz
Min
20 MHz
Min
25 MHz
Min
Parameter
Max
Max
Max
Max
Max
Max
Unit
Timing Requirement:
t
IFS
IRQx
1
or FI Setup before
CLKOUT Low
2, 3
t
IFS
IRQx
1
or FI Setup before
CLK OUT Low
(ADSP-2111)
2, 3
t
IFH
IRQx
1
or FI Hold after CLK OUT
High
2, 3
Switching Characteristic:
t
FOH
FO Hold after CLKOUT High
5
t
FOD
FO Delay from CLKOUT High
34.2
33.1
30
27.5
25
0.25t
CK
+ 15
4
ns
37.2
36.1
33
30.5
28
0.25t
CK
+ 18
4
ns
19.2
18.1
15
12.5
10
0.25t
CK
ns
0
0
0
0
0
0
ns
ns
15
15
15
15
12
NOTES
1
IRQx=IRQ0, IRQ1, and IRQ2.
2
If IRQx and FI inputs meet t
and t
setup/hold requirements, they will be recognized during the current clock cycle; otherwise they will be recognized
during the following cycle. (Refer to the “Interrupt Controller” section in Chapter 3, Program Control, of the
ADSP-2100 Family User’s Manual
for further
information on interrupt servicing.)
3
Edge-sensitive interrupts require pulse widths greater than 10 ns. Level-sensitive interrupts must be held low until serviced.
4
t
(min) = 0.25t
CK
+ 20 ns for ADSP-2101TG-50, ADSP-2101TG/883B-50, ADSP-2111TG-52, and ADSP-2111TG/883B-52 (Extended Temperature Range
devices).
5
t
FOH
(min) = –5 ns for ADSP-2111TG-52 and ADSP-2111TG/883B-52 (Extended Temperature Range devices).
Figure 30. Interrupts & Flags
CLKOUT
FLAG
OUTPUT(S)
t
FOD
IRQ
x
FI
t
FOH
t
IFH
t
IFS
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