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參數(shù)資料
| 型號： | ADT7460 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | dB COOL?? Remote Thermal Controller and Fan Controller |
| 中文描述： | 分貝很酷吧？？遠(yuǎn)程熱控制器和風(fēng)扇控制器 |
| 文件頁數(shù)： | 21/48頁 |
| 文件大小： | 695K |
| 代理商： | ADT7460 |
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REV. 0
ADT7460
–21–
7 6 5 4 3 2 1 0
22.76ms
45.52ms
THERM
91.04ms
182.08ms
364.16ms
728.32ms
1.457s
2.914s
IN
OUT
RESET
LATCH
STATUS REGISTER 2
CLEARED
ON READ
F4P BIT (BIT 5)
MASK REGISTER 2
(REG. 0x75)
1 = MASK
SMBALERT
F4P BIT (BIT 5)
THERM
TIMER CLEARED ON READ
COMPARATOR
THERM
TIMER
(REG. 0x79)
7
6
5
4
3
2
1
0
22.76ms
45.52ms
91.04ms
182.08ms
364.16ms
728.32ms
1.457s
2.914s
THERM
LIMIT
(REG. 0x7A)
Figure 26. Functional Diagram of ADT7460’s
THERM
Monitoring Circuitry
Configuring the Desired
THERM
Behavior
1. Configure the
THERM
input.
Setting Bit 1 (PHOT) of Configuration Register 3 (Reg. 0x78)
enables the
THERM
monitoring function.
2. Select the desired fan behavior for
THERM
events.
Setting
Bit
2 (BOOST bit) of Configuration Register 3
(Reg. 0x78) causes all fans to run at 100% duty cycle whenever
THERM
gets asserted. This allows fail-safe system cooling.
If this bit = 0, the fans will run at their current settings and
will not be affected by
THERM
events.
3. Select whether
THERM
events should generate
SMBALERT interrupts.
Bit 5 (F4P) of Mask Register 2 (Reg. 0x75), when set,
masks out
SMBALERT
s when the
THERM
limit value gets
exceeded. This bit should be cleared if
SMBALERT
s based
on
THERM
events are required.
4. Select a suitable
THERM
limit value.
This value determines whether an
SMBALERT
is generated
on the first
THERM
assertion, or only if a cumulative
THERM
assertion time limit is exceeded. A value of 0x00 causes an
SMBALERT
to be generated on the first
THERM
assertion.
5. Select a
THERM
monitoring time.
This is how often OS or BIOS level software checks the
THERM
timer. For example, BIOS could read the
THERM
timer once an hour to determine the cumulative
THERM
assertion time. If, for example, the total
THERM
assertion
time is <22.76 ms in Hour 1, >182.08 ms in Hour 2, and
>5.825 s in Hour 3, this can indicate that system perfor-
mance is degrading significantly since
THERM
is asserting
more frequently on an hourly basis.
Alternatively, OS or BIOS level software can time-stamp when
the system is powered on. If an
SMBALERT
is generated due
to the
THERM
limit being exceeded, another time-stamp can
be taken. The difference in time can be calculated for a fixed
THERM
Limit Register. This 8-bit register allows a limit from
0 seconds (first
THERM
assertion) to 5.825 seconds to be set
before an
SMBALERT
is generated. The
THERM
Timer value
is compared with the contents of the
THERM
Limit Register. If
the
THERM
Timer value exceeds the
THERM
Limit value,
then the F4P bit (Bit 5) of Status Register 2 gets set, and an
SMBALERT
is generated. Note that the F4P bit (Bit 5) of
Mask Register 2 (Reg. 0x75) will mask out
SMBALERT
s if this
bit is set to 1, although the F4P bit of Interrupt Status Register 2
will still get set if the
THERM
Limit is exceeded.
Figure 26 is a Functional Block Diagram of the
THERM
timer,
limit, and associated circuitry. Writing a value of 0x00 to the
THERM
Limit Register (Reg. 0x7A) causes
SMBALERT
to
be generated on the first
THERM
assertion. A
THERM
Limit
value of 0x01 generates an
SMBALERT
once cumulative
THERM
assertions exceed 45.52 ms.
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